Adding NV12 support

Submitted by Maarten Lankhorst on July 31, 2017, 6:57 a.m.

Details

Reviewer None
Submitted July 31, 2017, 6:57 a.m.
Last Updated Feb. 21, 2018, 4:44 p.m.
Revision 12

Cover Letter

This patch series is adding NV12 support for Broxton display after rebasing on
latest drm-tip.
Initial series of the patches can be found here:
https://lists.freedesktop.org/archives/intel-gfx/2015-May/066786.html

Previous revision history:
The first version of patches were reviewed when floated by Chandra in 2015
but currently there was a design change with respect to
- the way fb offset is handled
- the way rotation is handled
Current NV12 patch series has been ported as per the
current changes on drm-tip

Review comments from Ville (12th June 2017) have been addressed Review
comments from Clinton A Taylor (7th July 2017) have been addressed

Review comments from Clinton A Taylor (10th July 2017)
	have been addressed. Had missed out tested-by/reviewed-by in the patches.

	Fixed that error in this series.
	Review comments from Ville (11th July 2017) addressed.
	Review comments from Paauwe, Bob (29th July 2017) addressed.

Update from rev 28 Aug 2017
	Rebased the series.
	Tested with IGT for rotation, sprite and tiling combinations.
	IGT Links:
	https://patchwork.kernel.org/patch/9995943/
	https://patchwork.kernel.org/patch/9995945/
	Review comments by Maarten are addressed in this series.
	NV12 enabled for Gen10.
	Review comments from Shashank Sharma are addressed.
	IGT debug_fs test failure fixed.

Update from previous version:
	Added reviewed-by tag from Shashank Sharma for few patches
	Addressed review comments from Shashank Sharma in few patches
	Rebased the series

Chandra Konduru (6):
  drm/i915: Set scaler mode for NV12
  drm/i915: Update format_is_yuv() to include NV12
  drm/i915: Upscale scaler max scale for NV12
  drm/i915: Add NV12 as supported format for primary plane
  drm/i915: Add NV12 as supported format for sprite plane
  drm/i915: Add NV12 support to intel_framebuffer_init

Mahesh Kumar (9):
  drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
  drm/i915/skl+: refactor WM calculation for NV12
  drm/i915/skl+: add NV12 in skl_format_to_fourcc
  drm/i915/skl+: support verification of DDB HW state for NV12
  drm/i915/skl+: NV12 related changes for WM
  drm/i915/skl+: pass skl_wm_level struct to wm compute func
  drm/i915/skl+: make sure higher latency level has higher wm value
  drm/i915/skl+: nv12 workaround disable WM level 1-7
  drm/i915/skl: split skl_compute_ddb function

Vidya Srinivas (1):
  drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg

 drivers/gpu/drm/i915/i915_drv.h      |  10 +-
 drivers/gpu/drm/i915/i915_reg.h      |   8 +
 drivers/gpu/drm/i915/intel_atomic.c  |  13 +-
 drivers/gpu/drm/i915/intel_display.c |  59 ++++-
 drivers/gpu/drm/i915/intel_drv.h     |   9 +-
 drivers/gpu/drm/i915/intel_pm.c      | 438 ++++++++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_sprite.c  |  20 +-
 7 files changed, 369 insertions(+), 188 deletions(-)
  

Revisions

Patches download mbox

Tests

Series 28103v2 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/2/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600) fdo#100007
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-atomic:
                fail       -> PASS       (fi-snb-2600) fdo#100215
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-c:
                pass       -> INCOMPLETE (fi-kbl-7500u)

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:452s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:435s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:368s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:556s
fi-bwr-2160      total:279  pass:184  dwarn:0   dfail:0   fail:0   skip:95  time:234s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:524s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:520s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:516s
fi-elk-e7500     total:279  pass:230  dwarn:0   dfail:0   fail:0   skip:49  time:440s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:610s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:453s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:423s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:421s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:502s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:477s
fi-kbl-7500u     total:238  pass:222  dwarn:0   dfail:0   fail:0   skip:15 
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:595s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:595s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:525s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:462s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:474s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:487s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:443s
fi-skl-x1585l    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:500s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:544s
fi-snb-2600      total:279  pass:249  dwarn:0   dfail:0   fail:1   skip:29  time:405s

00b77f621f835bc114b79ec897b9aa277ea5726b drm-tip: 2017y-08m-28d-10h-25m-08s UTC integration manifest
149fc1e88a51 drm/i915: Add NV12 support to intel_framebuffer_init
26135eea1a26 drm/i915: Add NV12 as supported format for sprite plane
2083ffe043b7 drm/i915: Add NV12 as supported format for primary plane
93ab85476653 drm/i915: Upscale scaler max scale for NV12
d291f3965561 drm/i915: Update format_is_yuv() to include NV12
b6c629b41415 drm/i915: Set scaler mode for NV12

Patches download mbox

Tests

Series 28103v3 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/3/mbox/

Test chamelium:
        Subgroup dp-crc-fast:
                pass       -> FAIL       (fi-kbl-7500u) fdo#102514
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705
                pass       -> DMESG-WARN (fi-skl-6700k) fdo#100367

fdo#102514 https://bugs.freedesktop.org/show_bug.cgi?id=102514
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fdo#100367 https://bugs.freedesktop.org/show_bug.cgi?id=100367

fi-bdw-5557u     total:289  pass:268  dwarn:0   dfail:0   fail:0   skip:21  time:448s
fi-bdw-gvtdvm    total:289  pass:265  dwarn:0   dfail:0   fail:0   skip:24  time:470s
fi-blb-e6850     total:289  pass:223  dwarn:1   dfail:0   fail:0   skip:65  time:394s
fi-bsw-n3050     total:289  pass:243  dwarn:0   dfail:0   fail:0   skip:46  time:581s
fi-bwr-2160      total:289  pass:183  dwarn:0   dfail:0   fail:0   skip:106 time:285s
fi-bxt-dsi       total:289  pass:259  dwarn:0   dfail:0   fail:0   skip:30  time:523s
fi-bxt-j4205     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:521s
fi-byt-j1900     total:289  pass:253  dwarn:1   dfail:0   fail:0   skip:35  time:533s
fi-byt-n2820     total:289  pass:249  dwarn:1   dfail:0   fail:0   skip:39  time:523s
fi-cfl-s         total:289  pass:256  dwarn:1   dfail:0   fail:0   skip:32  time:562s
fi-cnl-y         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:614s
fi-glk-1         total:289  pass:261  dwarn:0   dfail:0   fail:0   skip:28  time:602s
fi-hsw-4770      total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:440s
fi-hsw-4770r     total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:416s
fi-ilk-650       total:289  pass:228  dwarn:0   dfail:0   fail:0   skip:61  time:457s
fi-ivb-3520m     total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:508s
fi-ivb-3770      total:289  pass:260  dwarn:0   dfail:0   fail:0   skip:29  time:475s
fi-kbl-7500u     total:289  pass:263  dwarn:1   dfail:0   fail:1   skip:24  time:495s
fi-kbl-7560u     total:289  pass:270  dwarn:0   dfail:0   fail:0   skip:19  time:580s
fi-kbl-7567u     total:289  pass:265  dwarn:4   dfail:0   fail:0   skip:20  time:486s
fi-kbl-r         total:289  pass:262  dwarn:0   dfail:0   fail:0   skip:27  time:589s
fi-pnv-d510      total:289  pass:222  dwarn:1   dfail:0   fail:0   skip:66  time:662s
fi-skl-6260u     total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:475s
fi-skl-6700hq    total:289  pass:263  dwarn:0   dfail:0   fail:0   skip:26  time:656s
fi-skl-6700k     total:289  pass:264  dwarn:1   dfail:0   fail:0   skip:24  time:534s
fi-skl-6770hq    total:289  pass:269  dwarn:0   dfail:0   fail:0   skip:20  time:513s
fi-skl-gvtdvm    total:289  pass:266  dwarn:0   dfail:0   fail:0   skip:23  time:467s
fi-snb-2520m     total:289  pass:250  dwarn:0   dfail:0   fail:0   skip:39  time:576s
fi-snb-2600      total:289  pass:249  dwarn:0   dfail:0   fail:0   skip:40  time:428s

6bcaf2275e52e258c737bc355e73072640be5ac3 drm-tip: 2017y-10m-10d-10h-57m-51s UTC integration manifest
004745daefae drm/i915: Add NV12 support to intel_framebuffer_init
ae6d144a9703 drm/i915: Add NV12 as supported format for sprite plane
303ea3604085 drm/i915: Add NV12 as supported format for primary plane
df988cd8065f drm/i915: Upscale scaler max scale for NV12
f884b0667862 drm/i915: Update format_is_yuv() to include NV12
5efd04f2a779 drm/i915: Set scaler mode for NV12
3d2d6ca030cb drm/i915/skl+: nv12 workaround disable WM level 1-7
0efd0ff59025 drm/i915/skl+: make sure higher latency level has higher wm value
34929470fcbf drm/i915/skl+: pass skl_wm_level struct to wm compute func
140217bcc810 drm/i915/skl+: NV12 related changes for WM
50cfca0614bb drm/i915/skl+: support varification of DDB HW state for NV12
0de16b2f24ed drm/i915/skl+: add NV12 in skl_format_to_fourcc
72bc128ecba2 drm/i915/skl+: refactore WM calculation for NV12
205ac002dabf drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
shard-hsw        total:2552 pass:1431 dwarn:5   dfail:0   fail:13  skip:1103 time:9650s

Patches download mbox

Tests

Series 28103v4 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/4/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                dmesg-warn -> PASS       (fi-kbl-r) fdo#104172 +1

fdo#104172 https://bugs.freedesktop.org/show_bug.cgi?id=104172

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:434s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:383s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:497s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:276s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:497s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:500s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:485s
fi-elk-e7500     total:224  pass:168  dwarn:10  dfail:0   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:265s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:523s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:404s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:412s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:428s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:470s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:429s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:479s
fi-kbl-7560u     total:288  pass:268  dwarn:1   dfail:0   fail:0   skip:19  time:513s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:466s
fi-kbl-r         total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:581s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:455s
fi-skl-6600u     total:288  pass:260  dwarn:1   dfail:0   fail:0   skip:27  time:520s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:542s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:510s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:495s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:448s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:542s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:412s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:584s
fi-cnl-y         total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:621s
fi-glk-dsi       total:146  pass:132  dwarn:0   dfail:0   fail:0   skip:13 

5f40895798adb2b511014d4bc7167845b179f8da drm-tip: 2018y-01m-04d-00h-29m-57s UTC integration manifest
0082abb5961f drm/i915: Add NV12 support to intel_framebuffer_init
4780dca7aad1 drm/i915: Add NV12 as supported format for sprite plane
ba5c1a3c01c4 drm/i915: Add NV12 as supported format for primary plane
a773f517ac31 drm/i915: Upscale scaler max scale for NV12
d346d416f4e9 drm/i915: Update format_is_yuv() to include NV12
f67b28c9a864 drm/i915: Set scaler mode for NV12
06931660493f drm/i915/skl: split skl_compute_ddb function
b86faabdbaa5 drm/i915/skl+: nv12 workaround disable WM level 1-7
2b317c27143a drm/i915/skl+: make sure higher latency level has higher wm value
3592b28607f1 drm/i915/skl+: pass skl_wm_level struct to wm compute func
8fb89e8729c5 drm/i915/skl+: NV12 related changes for WM
6203d1bf0e72 drm/i915/skl+: support varification of DDB HW state for NV12
507bd85af33f drm/i915/skl+: add NV12 in skl_format_to_fourcc
2f52e0672785 drm/i915/skl+: refactore WM calculation for NV12
4929c23ea698 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
# Checkpatch
$ ./scripts/checkpatch.pl -g origin/drm-tip..HEAD
4929c23ea698 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
2f52e0672785 drm/i915/skl+: refactore WM calculation for NV12
-:167: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#167: FILE: drivers/gpu/drm/i915/intel_pm.c:4155:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:185: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#185: FILE: drivers/gpu/drm/i915/intel_pm.c:4188:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:234: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#234: FILE: drivers/gpu/drm/i915/intel_pm.c:4252:
+		uint16_t plane_blocks, uv_plane_blocks;

-:299: CHECK: Alignment should match open parenthesis
#299: FILE: drivers/gpu/drm/i915/intel_pm.c:4784:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+				&ddb->uv_plane[pipe][plane_id]);

-:305: CHECK: Alignment should match open parenthesis
#305: FILE: drivers/gpu/drm/i915/intel_pm.c:4790:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+				&ddb->plane[pipe][plane_id]);

total: 0 errors, 0 warnings, 5 checks, 288 lines checked
507bd85af33f drm/i915/skl+: add NV12 in skl_format_to_fourcc
6203d1bf0e72 drm/i915/skl+: support varification of DDB HW state for NV12
-:77: CHECK: Unbalanced braces around else statement
#77: FILE: drivers/gpu/drm/i915/intel_pm.c:3856:
+	} else

total: 0 errors, 0 warnings, 1 checks, 77 lines checked
8fb89e8729c5 drm/i915/skl+: NV12 related changes for WM
3592b28607f1 drm/i915/skl+: pass skl_wm_level struct to wm compute func
2b317c27143a drm/i915/skl+: make sure higher latency level has higher wm value
b86faabdbaa5 drm/i915/skl+: nv12 workaround disable WM level 1-7
-:28: CHECK: Alignment should match open parenthesis
#28: FILE: drivers/gpu/drm/i915/intel_pm.c:4618:
+	if (wp->is_nv12 && level && (IS_SKYLAKE(dev_priv) ||
+			IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 1 checks, 17 lines checked
06931660493f drm/i915/skl: split skl_compute_ddb function
-:110: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#110: FILE: drivers/gpu/drm/i915/intel_pm.c:5090:
+	uint32_t realloc_pipes = pipes_modified(state);

-:129: CHECK: spaces preferred around that '*' (ctx:ExV)
#129: FILE: drivers/gpu/drm/i915/intel_pm.c:5109:
+		*changed = true;
 		^

-:192: CHECK: Please don't use multiple blank lines
#192: FILE: drivers/gpu/drm/i915/intel_pm.c:5171:
+
+

total: 0 errors, 0 warnings, 3 checks, 195 lines checked
f67b28c9a864 drm/i915: Set scaler mode for NV12
-:59: CHECK: Alignment should match open parenthesis
#59: FILE: drivers/gpu/drm/i915/intel_atomic.c:329:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			plane_state && plane_state->base.fb &&

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
d346d416f4e9 drm/i915: Update format_is_yuv() to include NV12
a773f517ac31 drm/i915: Upscale scaler max scale for NV12
-:103: CHECK: Alignment should match open parenthesis
#103: FILE: drivers/gpu/drm/i915/intel_display.c:12713:
+skl_max_scale(struct intel_crtc *intel_crtc,
+	struct intel_crtc_state *crtc_state, uint32_t pixel_format)

-:132: CHECK: Alignment should match open parenthesis
#132: FILE: drivers/gpu/drm/i915/intel_display.c:12764:
+			max_scale = skl_max_scale(to_intel_crtc(crtc),
+						crtc_state,

-:149: CHECK: Alignment should match open parenthesis
#149: FILE: drivers/gpu/drm/i915/intel_drv.h:1500:
+int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
+	uint32_t pixel_format);

-:163: CHECK: Alignment should match open parenthesis
#163: FILE: drivers/gpu/drm/i915/intel_sprite.c:901:
+			max_scale = skl_max_scale(crtc, crtc_state,
+						fb->format->format);

total: 0 errors, 0 warnings, 4 checks, 107 lines checked
ba5c1a3c01c4 drm/i915: Add NV12 as supported format for primary plane
-:45: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#45: FILE: drivers/gpu/drm/i915/intel_display.c:109:
+static const uint32_t nv12_primary_formats[] = {

-:71: CHECK: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/intel_display.c:13200:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			((pipe == PIPE_A || pipe == PIPE_B))) {

total: 0 errors, 0 warnings, 2 checks, 38 lines checked
4780dca7aad1 drm/i915: Add NV12 as supported format for sprite plane
-:57: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#57: FILE: drivers/gpu/drm/i915/intel_sprite.c:1282:
+static uint32_t nv12_plane_formats[] = {

-:81: CHECK: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/intel_sprite.c:1340:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			(pipe == PIPE_A || pipe == PIPE_B) && plane == 0) {

total: 0 errors, 0 warnings, 2 checks, 36 lines checked
0082abb5961f drm/i915: Add NV12 support to intel_framebuffer_init
-:54: CHECK: Alignment should match open parenthesis
#54: FILE: drivers/gpu/drm/i915/intel_display.c:14011:
+			DRM_DEBUG_KMS("unsupported pixel format: %s\n",
+		      drm_get_format_name(mode_cmd->pixel_format,

-:55: CHECK: Alignment should match open parenthesis
#55: FILE: drivers/gpu/drm/i915/intel_display.c:14012:
+		      drm_get_format_name(mode_cmd->pixel_format,
+				&format_name));

total: 0 errors, 0 warnings, 2 checks, 14 lines checked

Patches download mbox

Tests

Series 28103v5 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/5/mbox/

Test core_auth:
        Subgroup basic-auth:
                pass       -> INCOMPLETE (fi-skl-6700hq)
                pass       -> INCOMPLETE (fi-kbl-7500u)
Test debugfs_test:
        Subgroup read_all_entries:
                incomplete -> PASS       (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:418s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:425s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:372s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:487s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:280s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:470s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:466s
fi-elk-e7500     total:224  pass:168  dwarn:10  dfail:0   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:271s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:401s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:459s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:413s
fi-kbl-7500u     total:1    pass:0    dwarn:0   dfail:0   fail:0   skip:0  
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:581s
fi-skl-6700hq    total:1    pass:0    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:529s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:400s
fi-bxt-dsi failed to collect. IGT log at Patchwork_7672/fi-bxt-dsi/igt.log
fi-bxt-j4205 failed to connect after reboot
fi-cfl-s2 failed to collect. IGT log at Patchwork_7672/fi-cfl-s2/igt.log
fi-cnl-y2 failed to collect. IGT log at Patchwork_7672/fi-cnl-y2/igt.log
fi-glk-1 failed to collect. IGT log at Patchwork_7672/fi-glk-1/igt.log
fi-glk-dsi failed to collect. IGT log at Patchwork_7672/fi-glk-dsi/igt.log
fi-kbl-7560u failed to collect. IGT log at Patchwork_7672/fi-kbl-7560u/igt.log
fi-kbl-7567u failed to collect. IGT log at Patchwork_7672/fi-kbl-7567u/igt.log
fi-kbl-r failed to collect. IGT log at Patchwork_7672/fi-kbl-r/igt.log
fi-skl-6260u failed to collect. IGT log at Patchwork_7672/fi-skl-6260u/igt.log
fi-skl-6600u failed to collect. IGT log at Patchwork_7672/fi-skl-6600u/igt.log
fi-skl-6700k2 failed to collect. IGT log at Patchwork_7672/fi-skl-6700k2/igt.log
fi-skl-6770hq failed to collect. IGT log at Patchwork_7672/fi-skl-6770hq/igt.log
fi-skl-gvtdvm failed to collect. IGT log at Patchwork_7672/fi-skl-gvtdvm/igt.log

254125b984264731491e1eafbe58bc50e84a032d drm-tip: 2018y-01m-15d-09h-31m-31s UTC integration manifest
27f05af422f7 drm/i915: Add NV12 support to intel_framebuffer_init
e558e7ff13c6 drm/i915: Add NV12 as supported format for sprite plane
0b6028045fd5 drm/i915: Add NV12 as supported format for primary plane
bbbf0943fbfc drm/i915: Upscale scaler max scale for NV12
6063e680c38e drm/i915: Update format_is_yuv() to include NV12
2132b64159d1 drm/i915: Set scaler mode for NV12
41861f10a416 drm/i915/skl: split skl_compute_ddb function
9e0b5f63e088 drm/i915/skl+: nv12 workaround disable WM level 1-7
20e661c2375f drm/i915/skl+: make sure higher latency level has higher wm value
04965e783bba drm/i915/skl+: pass skl_wm_level struct to wm compute func
366ef9c698e5 drm/i915/skl+: NV12 related changes for WM
412b4e9f13d4 drm/i915/skl+: support verification of DDB HW state for NV12
535f80001279 drm/i915/skl+: add NV12 in skl_format_to_fourcc
b151bacc823e drm/i915/skl+: refactor WM calculation for NV12
eabc0f15ba55 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
eabc0f15ba55 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5001:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
b151bacc823e drm/i915/skl+: refactor WM calculation for NV12
-:27: WARNING: line over 80 characters
#27: FILE: drivers/gpu/drm/i915/i915_drv.h:1435:
+	struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES]; /* packed/y */

-:174: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#174: FILE: drivers/gpu/drm/i915/intel_pm.c:4156:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:192: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#192: FILE: drivers/gpu/drm/i915/intel_pm.c:4189:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:241: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#241: FILE: drivers/gpu/drm/i915/intel_pm.c:4253:
+		uint16_t plane_blocks, uv_plane_blocks;

-:306: CHECK: Alignment should match open parenthesis
#306: FILE: drivers/gpu/drm/i915/intel_pm.c:4785:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+					&ddb->uv_plane[pipe][plane_id]);

-:312: CHECK: Alignment should match open parenthesis
#312: FILE: drivers/gpu/drm/i915/intel_pm.c:4791:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+					&ddb->plane[pipe][plane_id]);

total: 0 errors, 1 warnings, 5 checks, 291 lines checked
535f80001279 drm/i915/skl+: add NV12 in skl_format_to_fourcc
412b4e9f13d4 drm/i915/skl+: support verification of DDB HW state for NV12
-:80: CHECK: Unbalanced braces around else statement
#80: FILE: drivers/gpu/drm/i915/intel_pm.c:3856:
+	} else

total: 0 errors, 0 warnings, 1 checks, 77 lines checked
366ef9c698e5 drm/i915/skl+: NV12 related changes for WM
04965e783bba drm/i915/skl+: pass skl_wm_level struct to wm compute func
20e661c2375f drm/i915/skl+: make sure higher latency level has higher wm value
9e0b5f63e088 drm/i915/skl+: nv12 workaround disable WM level 1-7
-:31: CHECK: Unnecessary parentheses around 'level >= 1'
#31: FILE: drivers/gpu/drm/i915/intel_pm.c:4618:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:32: CHECK: Alignment should match open parenthesis
#32: FILE: drivers/gpu/drm/i915/intel_pm.c:4619:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
41861f10a416 drm/i915/skl: split skl_compute_ddb function
-:110: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#110: FILE: drivers/gpu/drm/i915/intel_pm.c:5091:
+	uint32_t realloc_pipes = pipes_modified(state);

-:129: CHECK: spaces preferred around that '*' (ctx:ExV)
#129: FILE: drivers/gpu/drm/i915/intel_pm.c:5110:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
2132b64159d1 drm/i915: Set scaler mode for NV12
-:59: CHECK: Alignment should match open parenthesis
#59: FILE: drivers/gpu/drm/i915/intel_atomic.c:331:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			plane_state && plane_state->base.fb &&

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
6063e680c38e drm/i915: Update format_is_yuv() to include NV12
bbbf0943fbfc drm/i915: Upscale scaler max scale for NV12
-:103: CHECK: Alignment should match open parenthesis
#103: FILE: drivers/gpu/drm/i915/intel_display.c:12713:
+skl_max_scale(struct intel_crtc *intel_crtc,
+	struct intel_crtc_state *crtc_state, uint32_t pixel_format)

-:132: CHECK: Alignment should match open parenthesis
#132: FILE: drivers/gpu/drm/i915/intel_display.c:12764:
+			max_scale = skl_max_scale(to_intel_crtc(crtc),
+						crtc_state,

-:149: CHECK: Alignment should match open parenthesis
#149: FILE: drivers/gpu/drm/i915/intel_drv.h:1581:
+int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
+	uint32_t pixel_format);

-:163: CHECK: Alignment should match open parenthesis
#163: FILE: drivers/gpu/drm/i915/intel_sprite.c:901:
+			max_scale = skl_max_scale(crtc, crtc_state,
+						fb->format->format);

total: 0 errors, 0 warnings, 4 checks, 107 lines checked
0b6028045fd5 drm/i915: Add NV12 as supported format for primary plane
-:45: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#45: FILE: drivers/gpu/drm/i915/intel_display.c:109:
+static const uint32_t nv12_primary_formats[] = {

-:71: CHECK: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/intel_display.c:13200:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			((pipe == PIPE_A || pipe == PIPE_B))) {

total: 0 errors, 0 warnings, 2 checks, 38 lines checked
e558e7ff13c6 drm/i915: Add NV12 as supported format for sprite plane
-:57: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#57: FILE: drivers/gpu/drm/i915/intel_sprite.c:1282:
+static uint32_t nv12_plane_formats[] = {

-:81: CHECK: Alignment should match open parenthesis
#81: FILE: drivers/gpu/drm/i915/intel_sprite.c:1340:
+		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
+			(pipe == PIPE_A || pipe == PIPE_B) && plane == 0) {

total: 0 errors, 0 warnings, 2 checks, 36 lines checked
27f05af422f7 drm/i915: Add NV12 support to intel_framebuffer_init
-:54: CHECK: Alignment should match open parenthesis
#54: FILE: drivers/gpu/drm/i915/intel_display.c:14011:
+			DRM_DEBUG_KMS("unsupported pixel format: %s\n",
+		      drm_get_format_name(mode_cmd->pixel_format,

-:55: CHECK: Alignment should match open parenthesis
#55: FILE: drivers/gpu/drm/i915/intel_display.c:14012:
+		      drm_get_format_name(mode_cmd->pixel_format,
+				&format_name));

total: 0 errors, 0 warnings, 2 checks, 14 lines checked
Test gem_tiled_swapping:
        Subgroup non-threaded:
                incomplete -> PASS       (shard-hsw) fdo#104218 +1
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> SKIP       (shard-hsw) fdo#103375 +1
Test kms_frontbuffer_tracking:
        Subgroup fbc-1p-offscren-pri-shrfb-draw-blt:
                fail       -> PASS       (shard-snb) fdo#101623

fdo#104218 https://bugs.freedesktop.org/show_bug.cgi?id=104218
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623

shard-hsw        total:2698 pass:1528 dwarn:1   dfail:0   fail:9   skip:1159 time:8797s
shard-snb        total:2713 pass:1311 dwarn:1   dfail:0   fail:10  skip:1391 time:7897s
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
+drivers/gpu/drm/i915/intel_pm.c:4794:73: warning: Using plain integer as NULL pointer

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
Okay!

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
Okay!

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Patches download mbox

Tests

Series 28103v7 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/7/mbox/

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:427s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:432s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:383s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:521s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:292s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:501s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:497s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:494s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:479s
fi-elk-e7500     total:224  pass:168  dwarn:9   dfail:1   fail:0   skip:45 
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:307s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:531s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:394s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:404s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:420s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:469s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:419s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:468s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:501s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:464s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:634s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:436s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:519s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:534s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:495s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:496s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:427s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:442s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:409s
Blacklisted hosts:
fi-cfl-s2        total:288  pass:256  dwarn:0   dfail:0   fail:3   skip:26  time:564s
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:485s

be38e25290c9e7d4fe196977d71ea4aba7d92dd1 drm-tip: 2018y-01m-22d-11h-16m-45s UTC integration manifest
eb196c11b901 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
0c7152ea9eea drm/i915: Add NV12 support to intel_framebuffer_init
9d2ea1c202e1 drm/i915: Add NV12 as supported format for sprite plane
514cf2654ce7 drm/i915: Add NV12 as supported format for primary plane
9d6475430376 drm/i915: Upscale scaler max scale for NV12
de495f7786ef drm/i915: Update format_is_yuv() to include NV12
6ad39e4b8620 drm/i915: Set scaler mode for NV12
6c62dead084e drm/i915/skl: split skl_compute_ddb function
b7024c4da6d9 drm/i915/skl+: nv12 workaround disable WM level 1-7
97ae3e76f79b drm/i915/skl+: make sure higher latency level has higher wm value
61331a2db19b drm/i915/skl+: pass skl_wm_level struct to wm compute func
56148e08cf02 drm/i915/skl+: NV12 related changes for WM
3baebdbb122f drm/i915/skl+: support verification of DDB HW state for NV12
bb3fd7868e54 drm/i915/skl+: add NV12 in skl_format_to_fourcc
6a0ed4afec26 drm/i915/skl+: refactor WM calculation for NV12
009a14962919 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
009a14962919 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5001:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
6a0ed4afec26 drm/i915/skl+: refactor WM calculation for NV12
-:27: WARNING: line over 80 characters
#27: FILE: drivers/gpu/drm/i915/i915_drv.h:1436:
+	struct skl_ddb_entry plane[I915_MAX_PIPES][I915_MAX_PLANES]; /* packed/y */

-:174: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#174: FILE: drivers/gpu/drm/i915/intel_pm.c:4156:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:192: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#192: FILE: drivers/gpu/drm/i915/intel_pm.c:4189:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:241: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#241: FILE: drivers/gpu/drm/i915/intel_pm.c:4253:
+		uint16_t plane_blocks, uv_plane_blocks;

-:306: CHECK: Alignment should match open parenthesis
#306: FILE: drivers/gpu/drm/i915/intel_pm.c:4785:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+					&ddb->uv_plane[pipe][plane_id]);

-:312: CHECK: Alignment should match open parenthesis
#312: FILE: drivers/gpu/drm/i915/intel_pm.c:4791:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+					&ddb->plane[pipe][plane_id]);

total: 0 errors, 1 warnings, 5 checks, 291 lines checked
bb3fd7868e54 drm/i915/skl+: add NV12 in skl_format_to_fourcc
3baebdbb122f drm/i915/skl+: support verification of DDB HW state for NV12
-:80: CHECK: Unbalanced braces around else statement
#80: FILE: drivers/gpu/drm/i915/intel_pm.c:3856:
+	} else

total: 0 errors, 0 warnings, 1 checks, 77 lines checked
56148e08cf02 drm/i915/skl+: NV12 related changes for WM
61331a2db19b drm/i915/skl+: pass skl_wm_level struct to wm compute func
97ae3e76f79b drm/i915/skl+: make sure higher latency level has higher wm value
b7024c4da6d9 drm/i915/skl+: nv12 workaround disable WM level 1-7
-:31: CHECK: Unnecessary parentheses around 'level >= 1'
#31: FILE: drivers/gpu/drm/i915/intel_pm.c:4618:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:32: CHECK: Alignment should match open parenthesis
#32: FILE: drivers/gpu/drm/i915/intel_pm.c:4619:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
6c62dead084e drm/i915/skl: split skl_compute_ddb function
-:110: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#110: FILE: drivers/gpu/drm/i915/intel_pm.c:5091:
+	uint32_t realloc_pipes = pipes_modified(state);

-:129: CHECK: spaces preferred around that '*' (ctx:ExV)
#129: FILE: drivers/gpu/drm/i915/intel_pm.c:5110:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
6ad39e4b8620 drm/i915: Set scaler mode for NV12
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_atomic.c:331:
+		if ((INTEL_GEN(dev_priv) >= 9) &&
+			plane_state && plane_state->base.fb &&

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
de495f7786ef drm/i915: Update format_is_yuv() to include NV12
9d6475430376 drm/i915: Upscale scaler max scale for NV12
-:105: CHECK: Alignment should match open parenthesis
#105: FILE: drivers/gpu/drm/i915/intel_display.c:12711:
+skl_max_scale(struct intel_crtc *intel_crtc,
+	struct intel_crtc_state *crtc_state, uint32_t pixel_format)

-:134: CHECK: Alignment should match open parenthesis
#134: FILE: drivers/gpu/drm/i915/intel_display.c:12762:
+			max_scale = skl_max_scale(to_intel_crtc(crtc),
+						crtc_state,

-:151: CHECK: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/i915/intel_drv.h:1581:
+int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
+	uint32_t pixel_format);

-:165: CHECK: Alignment should match open parenthesis
#165: FILE: drivers/gpu/drm/i915/intel_sprite.c:901:
+			max_scale = skl_max_scale(crtc, crtc_state,
+						fb->format->format);

total: 0 errors, 0 warnings, 4 checks, 107 lines checked
514cf2654ce7 drm/i915: Add NV12 as supported format for primary plane
-:56: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#56: FILE: drivers/gpu/drm/i915/intel_display.c:13175:
+		if (INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C))

total: 0 errors, 0 warnings, 1 checks, 16 lines checked
9d2ea1c202e1 drm/i915: Add NV12 as supported format for sprite plane
-:68: CHECK: Unnecessary parentheses around 'plane != 0'
#68: FILE: drivers/gpu/drm/i915/intel_sprite.c:1363:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

-:68: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#68: FILE: drivers/gpu/drm/i915/intel_sprite.c:1363:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

-:69: CHECK: Alignment should match open parenthesis
#69: FILE: drivers/gpu/drm/i915/intel_sprite.c:1364:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

total: 0 errors, 0 warnings, 3 checks, 17 lines checked
0c7152ea9eea drm/i915: Add NV12 support to intel_framebuffer_init
-:59: CHECK: Alignment should match open parenthesis
#59: FILE: drivers/gpu/drm/i915/intel_display.c:13982:
+			DRM_DEBUG_KMS("unsupported pixel format: %s\n",
+		      drm_get_format_name(mode_cmd->pixel_format,

-:60: CHECK: Alignment should match open parenthesis
#60: FILE: drivers/gpu/drm/i915/intel_display.c:13983:
+		      drm_get_format_name(mode_cmd->pixel_format,
+				&format_name));

total: 0 errors, 0 warnings, 2 checks, 14 lines checked
eb196c11b901 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:21: CHECK: Prefer using the BIT macro
#21: FILE: drivers/gpu/drm/i915/i915_reg.h:6389:
+#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709	(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
Test kms_flip:
        Subgroup 2x-flip-vs-dpms-off-vs-modeset:
                pass       -> DMESG-WARN (shard-hsw)
        Subgroup 2x-vblank-vs-modeset-suspend-interruptible:
                incomplete -> PASS       (shard-hsw)
Test kms_plane_lowres:
        Subgroup pipe-c-tiling-x:
                pass       -> FAIL       (shard-apl) fdo#103166
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> SKIP       (shard-hsw) fdo#103375
Test kms_frontbuffer_tracking:
        Subgroup fbc-rgb565-draw-blt:
                pass       -> FAIL       (shard-snb) fdo#101623
Test kms_sysfs_edid_timing:
                warn       -> PASS       (shard-apl) fdo#100047
Test kms_cursor_legacy:
        Subgroup flip-vs-cursor-legacy:
                pass       -> FAIL       (shard-apl) fdo#102670
Test pm_rc6_residency:
        Subgroup rc6-accuracy:
                pass       -> SKIP       (shard-snb)
Test kms_atomic_transition:
        Subgroup 1x-modeset-transitions:
                fail       -> PASS       (shard-apl) fdo#103207
Test perf:
        Subgroup buffer-fill:
                fail       -> PASS       (shard-apl) fdo#103755
        Subgroup polling:
                pass       -> FAIL       (shard-hsw) fdo#102252

fdo#103166 https://bugs.freedesktop.org/show_bug.cgi?id=103166
fdo#103375 https://bugs.freedesktop.org/show_bug.cgi?id=103375
fdo#101623 https://bugs.freedesktop.org/show_bug.cgi?id=101623
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047
fdo#102670 https://bugs.freedesktop.org/show_bug.cgi?id=102670
fdo#103207 https://bugs.freedesktop.org/show_bug.cgi?id=103207
fdo#103755 https://bugs.freedesktop.org/show_bug.cgi?id=103755
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252

shard-apl        total:2780 pass:1714 dwarn:1   dfail:0   fail:25  skip:1040 time:14689s
shard-hsw        total:2780 pass:1721 dwarn:2   dfail:0   fail:13  skip:1043 time:15527s
shard-snb        total:2780 pass:1315 dwarn:1   dfail:0   fail:14  skip:1450 time:8094s
Blacklisted hosts:
shard-kbl        total:2780 pass:1837 dwarn:1   dfail:0   fail:24  skip:918 time:11085s
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
Okay!

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
Okay!

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
Okay!

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!

Patches download mbox

Tests

Series 28103v8 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/8/mbox/

Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575
Test gem_sync:
        Subgroup basic-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-each:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-many-each:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-store-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-store-each:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_tiled_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_tiled_fence_blits:
        Subgroup basic:
                pass       -> SKIP       (fi-blb-e6850)
Test gem_wait:
        Subgroup basic-busy-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-wait-all:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-await-all:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_busy:
        Subgroup basic-flip-a:
                pass       -> SKIP       (fi-blb-e6850)
        Subgroup basic-flip-b:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_cursor_legacy:
        Subgroup basic-busy-flip-before-cursor-legacy:
                pass       -> SKIP       (fi-blb-e6850)
Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-a:
                pass       -> DMESG-WARN (fi-cnl-y3)
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713
        Subgroup suspend-read-crc-pipe-c:
                pass       -> FAIL       (fi-ivb-3520m) k.org#198519

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
k.org#198519 https://bugzilla.kernel.org/show_bug.cgi?id=198519

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:420s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:423s
fi-blb-e6850     total:288  pass:210  dwarn:1   dfail:0   fail:0   skip:77  time:344s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:485s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:492s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:490s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:466s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:465s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:566s
fi-cnl-y3        total:288  pass:261  dwarn:1   dfail:0   fail:0   skip:26  time:574s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:419s
fi-gdg-551       total:288  pass:180  dwarn:0   dfail:0   fail:0   skip:108 time:281s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:512s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:391s
fi-hsw-4770r     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:398s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:416s
fi-ivb-3520m     total:288  pass:258  dwarn:0   dfail:0   fail:1   skip:29  time:435s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:416s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:453s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:498s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:455s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:498s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:590s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:426s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:505s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:528s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:487s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:477s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:411s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:426s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:393s
Blacklisted hosts:
fi-glk-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:468s

078873da383505cf8d6940229007115b31f1d5e0 drm-tip: 2018y-02m-06d-11h-21m-36s UTC integration manifest
758d77c6ee28 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
6be5c8e6ec28 drm/i915: Add NV12 support to intel_framebuffer_init
2c70c548552d drm/i915: Add NV12 as supported format for sprite plane
415c3f1e6d98 drm/i915: Add NV12 as supported format for primary plane
aa3902c0c79a drm/i915: Upscale scaler max scale for NV12
c65230208baa drm/i915: Update format_is_yuv() to include NV12
b731d6d19776 drm/i915: Set scaler mode for NV12
a221684864ae drm/i915/skl: split skl_compute_ddb function
1bdb1d807b88 drm/i915/skl+: nv12 workaround disable WM level 1-7
e8434df6cf5b drm/i915/skl+: make sure higher latency level has higher wm value
4e843648e1a4 drm/i915/skl+: pass skl_wm_level struct to wm compute func
17a74efbd73f drm/i915/skl+: NV12 related changes for WM
58a798c571b8 drm/i915/skl+: support verification of DDB HW state for NV12
869607822dff drm/i915/skl+: add NV12 in skl_format_to_fourcc
54d700f07be9 drm/i915/skl+: refactor WM calculation for NV12
256fad015601 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
256fad015601 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5046:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
54d700f07be9 drm/i915/skl+: refactor WM calculation for NV12
-:177: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#177: FILE: drivers/gpu/drm/i915/intel_pm.c:4164:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:195: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#195: FILE: drivers/gpu/drm/i915/intel_pm.c:4197:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:244: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#244: FILE: drivers/gpu/drm/i915/intel_pm.c:4261:
+		uint16_t plane_blocks, uv_plane_blocks;

-:310: CHECK: Alignment should match open parenthesis
#310: FILE: drivers/gpu/drm/i915/intel_pm.c:4834:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+			&ddb->uv_plane[pipe][plane_id]);

-:318: CHECK: Alignment should match open parenthesis
#318: FILE: drivers/gpu/drm/i915/intel_pm.c:4840:
+		skl_ddb_entry_write(dev_priv, PLANE_BUF_CFG(pipe, plane_id),
+			&ddb->plane[pipe][plane_id]);

total: 0 errors, 0 warnings, 5 checks, 293 lines checked
869607822dff drm/i915/skl+: add NV12 in skl_format_to_fourcc
58a798c571b8 drm/i915/skl+: support verification of DDB HW state for NV12
-:80: CHECK: Unbalanced braces around else statement
#80: FILE: drivers/gpu/drm/i915/intel_pm.c:3864:
+	} else

total: 0 errors, 0 warnings, 1 checks, 77 lines checked
17a74efbd73f drm/i915/skl+: NV12 related changes for WM
4e843648e1a4 drm/i915/skl+: pass skl_wm_level struct to wm compute func
e8434df6cf5b drm/i915/skl+: make sure higher latency level has higher wm value
1bdb1d807b88 drm/i915/skl+: nv12 workaround disable WM level 1-7
-:31: CHECK: Unnecessary parentheses around 'level >= 1'
#31: FILE: drivers/gpu/drm/i915/intel_pm.c:4661:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:32: CHECK: Alignment should match open parenthesis
#32: FILE: drivers/gpu/drm/i915/intel_pm.c:4662:
+	if (wp->is_nv12 && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
a221684864ae drm/i915/skl: split skl_compute_ddb function
-:110: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#110: FILE: drivers/gpu/drm/i915/intel_pm.c:5138:
+	uint32_t realloc_pipes = pipes_modified(state);

-:129: CHECK: spaces preferred around that '*' (ctx:ExV)
#129: FILE: drivers/gpu/drm/i915/intel_pm.c:5157:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
b731d6d19776 drm/i915: Set scaler mode for NV12
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_atomic.c:331:
+		if ((INTEL_GEN(dev_priv) >= 9) &&
+			plane_state && plane_state->base.fb &&

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
c65230208baa drm/i915: Update format_is_yuv() to include NV12
aa3902c0c79a drm/i915: Upscale scaler max scale for NV12
-:105: CHECK: Alignment should match open parenthesis
#105: FILE: drivers/gpu/drm/i915/intel_display.c:12768:
+skl_max_scale(struct intel_crtc *intel_crtc,
+	struct intel_crtc_state *crtc_state, uint32_t pixel_format)

-:134: CHECK: Alignment should match open parenthesis
#134: FILE: drivers/gpu/drm/i915/intel_display.c:12820:
+			max_scale = skl_max_scale(to_intel_crtc(crtc),
+						crtc_state,

-:151: CHECK: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/i915/intel_drv.h:1584:
+int skl_max_scale(struct intel_crtc *crtc, struct intel_crtc_state *crtc_state,
+	uint32_t pixel_format);

-:165: CHECK: Alignment should match open parenthesis
#165: FILE: drivers/gpu/drm/i915/intel_sprite.c:901:
+			max_scale = skl_max_scale(crtc, crtc_state,
+						fb->format->format);

total: 0 errors, 0 warnings, 4 checks, 107 lines checked
415c3f1e6d98 drm/i915: Add NV12 as supported format for primary plane
-:56: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#56: FILE: drivers/gpu/drm/i915/intel_display.c:13237:
+		if (INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C))

total: 0 errors, 0 warnings, 1 checks, 16 lines checked
2c70c548552d drm/i915: Add NV12 as supported format for sprite plane
-:68: CHECK: Unnecessary parentheses around 'plane != 0'
#68: FILE: drivers/gpu/drm/i915/intel_sprite.c:1370:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

-:68: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#68: FILE: drivers/gpu/drm/i915/intel_sprite.c:1370:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

-:69: CHECK: Alignment should match open parenthesis
#69: FILE: drivers/gpu/drm/i915/intel_sprite.c:1371:
+		if (INTEL_GEN(dev_priv) <= 10 && ((plane != 0) ||
+			(pipe == PIPE_C)))

total: 0 errors, 0 warnings, 3 checks, 17 lines checked
6be5c8e6ec28 drm/i915: Add NV12 support to intel_framebuffer_init
-:59: CHECK: Alignment should match open parenthesis
#59: FILE: drivers/gpu/drm/i915/intel_display.c:14046:
+			DRM_DEBUG_KMS("unsupported pixel format: %s\n",
+		      drm_get_format_name(mode_cmd->pixel_format,

-:60: CHECK: Alignment should match open parenthesis
#60: FILE: drivers/gpu/drm/i915/intel_display.c:14047:
+		      drm_get_format_name(mode_cmd->pixel_format,
+				&format_name));

total: 0 errors, 0 warnings, 2 checks, 14 lines checked
758d77c6ee28 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:21: CHECK: Prefer using the BIT macro
#21: FILE: drivers/gpu/drm/i915/i915_reg.h:6431:
+#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709	(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
Okay!

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
Okay!

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
Okay!

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!

Patches download mbox

Tests

Series 28103v9 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/9/mbox/

Test debugfs_test:
        Subgroup read_all_entries:
                pass       -> INCOMPLETE (fi-skl-6260u)
                pass       -> INCOMPLETE (fi-skl-6600u)
                pass       -> INCOMPLETE (fi-skl-6700hq)
                pass       -> INCOMPLETE (fi-skl-6700k2)
                pass       -> INCOMPLETE (fi-skl-6770hq)
                pass       -> INCOMPLETE (fi-skl-guc)
                pass       -> INCOMPLETE (fi-skl-gvtdvm)
                pass       -> INCOMPLETE (fi-bxt-dsi)
                pass       -> INCOMPLETE (fi-bxt-j4205)
                pass       -> INCOMPLETE (fi-kbl-7500u)
                pass       -> INCOMPLETE (fi-kbl-7560u)
                pass       -> INCOMPLETE (fi-kbl-r)
                pass       -> INCOMPLETE (fi-glk-1)
                pass       -> INCOMPLETE (fi-cfl-s2)
                pass       -> INCOMPLETE (fi-cnl-y3)
Test gem_mmap_gtt:
        Subgroup basic-small-bo-tiledx:
                fail       -> PASS       (fi-gdg-551) fdo#102575

fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575

fi-bdw-5557u     total:288  pass:265  dwarn:0   dfail:0   fail:2   skip:21  time:440s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:426s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:379s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:499s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:290s
fi-bxt-dsi       total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-bxt-j4205     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:475s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:464s
fi-cfl-s2        total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-cnl-y3        total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:425s
fi-gdg-551       total:288  pass:180  dwarn:0   dfail:0   fail:0   skip:108 time:284s
fi-glk-1         total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-hsw-4770      total:288  pass:259  dwarn:0   dfail:0   fail:2   skip:27  time:412s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:413s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:449s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:417s
fi-kbl-7500u     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-kbl-7560u     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-kbl-r         total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:589s
fi-skl-6260u     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6600u     total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6700hq    total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6700k2    total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-6770hq    total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-guc       total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-skl-gvtdvm    total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:529s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:399s
Blacklisted hosts:
fi-glk-dsi       total:3    pass:2    dwarn:0   dfail:0   fail:0   skip:0  

013536408c7f1cd9049580cfc71865fcdeb86fa0 drm-tip: 2018y-02m-13d-07h-39m-27s UTC integration manifest
9ddb1b7bb8d0 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
debcd8661a6f drm/i915: Add NV12 support to intel_framebuffer_init
aec85294fdf0 drm/i915: Add NV12 as supported format for sprite plane
0b27b6661d93 drm/i915: Add NV12 as supported format for primary plane
d663c21e1e61 drm/i915: Upscale scaler max scale for NV12
d5ab4be5be8d drm/i915: Update format_is_yuv() to include NV12
b8309ae10590 drm/i915: Set scaler mode for NV12
c0c0fc34cb86 drm/i915/skl: split skl_compute_ddb function
3e841c628f8f drm/i915/skl+: nv12 workaround disable WM level 1-7
14d260795917 drm/i915/skl+: make sure higher latency level has higher wm value
6de0455767ce drm/i915/skl+: pass skl_wm_level struct to wm compute func
c6984cc3f781 drm/i915/skl+: NV12 related changes for WM
d50a53d0520c drm/i915/skl+: support verification of DDB HW state for NV12
56fb963bf048 drm/i915/skl+: add NV12 in skl_format_to_fourcc
2d1913bf696c drm/i915/skl+: refactor WM calculation for NV12
635ac08d1f87 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
635ac08d1f87 drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5048:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
2d1913bf696c drm/i915/skl+: refactor WM calculation for NV12
-:177: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#177: FILE: drivers/gpu/drm/i915/intel_pm.c:4164:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:195: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#195: FILE: drivers/gpu/drm/i915/intel_pm.c:4197:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:244: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#244: FILE: drivers/gpu/drm/i915/intel_pm.c:4261:
+		uint16_t plane_blocks, uv_plane_blocks;

total: 0 errors, 0 warnings, 3 checks, 293 lines checked
56fb963bf048 drm/i915/skl+: add NV12 in skl_format_to_fourcc
d50a53d0520c drm/i915/skl+: support verification of DDB HW state for NV12
c6984cc3f781 drm/i915/skl+: NV12 related changes for WM
-:105: WARNING: line over 80 characters
#105: FILE: drivers/gpu/drm/i915/intel_pm.c:4680:
+	ddb_blocks = plane_num ? skl_ddb_entry_size(&ddb->uv_plane[pipe][plane_id]) :

-:106: WARNING: line over 80 characters
#106: FILE: drivers/gpu/drm/i915/intel_pm.c:4681:
+				 skl_ddb_entry_size(&ddb->plane[pipe][plane_id]);

total: 0 errors, 2 warnings, 0 checks, 140 lines checked
6de0455767ce drm/i915/skl+: pass skl_wm_level struct to wm compute func
14d260795917 drm/i915/skl+: make sure higher latency level has higher wm value
3e841c628f8f drm/i915/skl+: nv12 workaround disable WM level 1-7
-:31: CHECK: Unnecessary parentheses around 'level >= 1'
#31: FILE: drivers/gpu/drm/i915/intel_pm.c:4663:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:32: CHECK: Alignment should match open parenthesis
#32: FILE: drivers/gpu/drm/i915/intel_pm.c:4664:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
c0c0fc34cb86 drm/i915/skl: split skl_compute_ddb function
-:110: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#110: FILE: drivers/gpu/drm/i915/intel_pm.c:5139:
+	uint32_t realloc_pipes = pipes_modified(state);

-:129: CHECK: spaces preferred around that '*' (ctx:ExV)
#129: FILE: drivers/gpu/drm/i915/intel_pm.c:5158:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
b8309ae10590 drm/i915: Set scaler mode for NV12
-:55: CHECK: Prefer using the BIT macro
#55: FILE: drivers/gpu/drm/i915/i915_reg.h:6708:
+#define PS_SCALER_MODE_PLANAR (1 << 29)

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
d5ab4be5be8d drm/i915: Update format_is_yuv() to include NV12
d663c21e1e61 drm/i915: Upscale scaler max scale for NV12
-:141: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#141: FILE: drivers/gpu/drm/i915/intel_display.c:12819:
+	uint32_t pixel_format = 0;

total: 0 errors, 0 warnings, 1 checks, 119 lines checked
0b27b6661d93 drm/i915: Add NV12 as supported format for primary plane
-:57: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#57: FILE: drivers/gpu/drm/i915/intel_display.c:13242:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

-:58: CHECK: Alignment should match open parenthesis
#58: FILE: drivers/gpu/drm/i915/intel_display.c:13243:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
aec85294fdf0 drm/i915: Add NV12 as supported format for sprite plane
-:71: CHECK: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/intel_sprite.c:1374:
+		if ((INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) &&
+		    (plane != 0 || pipe == PIPE_C)) ||

total: 0 errors, 0 warnings, 1 checks, 19 lines checked
debcd8661a6f drm/i915: Add NV12 support to intel_framebuffer_init
-:61: WARNING: line over 80 characters
#61: FILE: drivers/gpu/drm/i915/intel_display.c:14052:
+				      drm_get_format_name(mode_cmd->pixel_format,

-:62: CHECK: Alignment should match open parenthesis
#62: FILE: drivers/gpu/drm/i915/intel_display.c:14053:
+				      drm_get_format_name(mode_cmd->pixel_format,
+				      &format_name));

total: 0 errors, 1 warnings, 1 checks, 14 lines checked
9ddb1b7bb8d0 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:21: CHECK: Prefer using the BIT macro
#21: FILE: drivers/gpu/drm/i915/i915_reg.h:6431:
+#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709	(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
-drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
+     ^~
+        ^~
-drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
-drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_pm.c:4656:19: error: no member 'is_nv12' in struct skl_plane_wm
+drivers/gpu/drm/i915/intel_pm.c:4656:19: warning: generating address of non-lvalue (8)
+drivers/gpu/drm/i915/intel_pm.c:4656:5: error: ‘struct skl_plane_wm’ has no member named ‘is_nv12’
+drivers/gpu/drm/i915/intel_pm.c:4834:15: error: no member 'is_nv12' in struct skl_plane_wm
+drivers/gpu/drm/i915/intel_pm.c:4834:15: warning: unknown expression (8 46)
+drivers/gpu/drm/i915/intel_pm.c:4834:8: error: ‘const struct skl_plane_wm’ has no member named ‘is_nv12’
+drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_compute_wm_levels’:
+drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_write_plane_wm’:
+  if (wm->is_nv12) {
+make[1]: *** [drivers/gpu/drm/i915] Error 2
+make[2]: *** [drivers/gpu/drm/i915/intel_pm.o] Error 1
+make[2]: *** Waiting for unfinished jobs....
+make[2]: *** wait: No child processes.  Stop.
+make: *** [drivers/gpu/drm/] Error 2
+   wm->is_nv12 = true;

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
-drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
-drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
-     ^~
-        ^~
+drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216
-O:drivers/gpu/drm/i915/intel_pm.c:4687:19: error: no member 'is_nv12' in struct skl_plane_wm
-O:drivers/gpu/drm/i915/intel_pm.c:4687:19: warning: generating address of non-lvalue (8)
-O:drivers/gpu/drm/i915/intel_pm.c:4687:5: error: ‘struct skl_plane_wm’ has no member named ‘is_nv12’
-O:drivers/gpu/drm/i915/intel_pm.c:4865:15: error: no member 'is_nv12' in struct skl_plane_wm
-O:drivers/gpu/drm/i915/intel_pm.c:4865:15: warning: unknown expression (8 46)
-O:drivers/gpu/drm/i915/intel_pm.c:4865:8: error: ‘const struct skl_plane_wm’ has no member named ‘is_nv12’
-drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_compute_wm_levels’:
-drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_write_plane_wm’:
-  if (wm->is_nv12) {
-make[1]: *** [drivers/gpu/drm/i915] Error 2
-make[2]: *** [drivers/gpu/drm/i915/intel_pm.o] Error 1
-make[2]: *** Waiting for unfinished jobs....
-make: *** [drivers/gpu/drm/] Error 2
-   wm->is_nv12 = true;

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!

Patches download mbox

Tests

Series 28103v10 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/10/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:423s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:425s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:374s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:495s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:287s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:484s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:468s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:464s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:579s
fi-cnl-y3        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:582s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:417s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:281s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:508s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:389s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:413s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:469s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:413s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:455s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:495s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:500s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:590s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:431s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:506s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:525s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:482s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:416s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:430s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:399s
Blacklisted hosts:
fi-glk-dsi       total:117  pass:104  dwarn:0   dfail:0   fail:0   skip:12 
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:451s

8ee739e0bcde50bd5ce8d40d57a1a146e167756d drm-tip: 2018y-02m-14d-13h-29m-07s UTC integration manifest
cbd0c912abc5 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
ce89283213c8 drm/i915: Add NV12 support to intel_framebuffer_init
ae5ae7ff03c9 drm/i915: Add NV12 as supported format for sprite plane
f1903a03f713 drm/i915: Add NV12 as supported format for primary plane
01f0c6f70548 drm/i915: Upscale scaler max scale for NV12
3a9703128148 drm/i915: Update format_is_yuv() to include NV12
03a7f4c2c145 drm/i915: Set scaler mode for NV12
1b76997e221e drm/i915/skl: split skl_compute_ddb function
59a9d6928dbf drm/i915/skl+: nv12 workaround disable WM level 1-7
63822fee142a drm/i915/skl+: make sure higher latency level has higher wm value
c1d175ff311e drm/i915/skl+: pass skl_wm_level struct to wm compute func
a41cb6ea7434 drm/i915/skl+: NV12 related changes for WM
f995dc9b92e0 drm/i915/skl+: support verification of DDB HW state for NV12
e8d4aa625cc3 drm/i915/skl+: add NV12 in skl_format_to_fourcc
30eb3a788144 drm/i915/skl+: refactor WM calculation for NV12
6e8ea1c042eb drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
6e8ea1c042eb drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5048:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
30eb3a788144 drm/i915/skl+: refactor WM calculation for NV12
-:177: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#177: FILE: drivers/gpu/drm/i915/intel_pm.c:4164:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:195: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#195: FILE: drivers/gpu/drm/i915/intel_pm.c:4197:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:244: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#244: FILE: drivers/gpu/drm/i915/intel_pm.c:4261:
+		uint16_t plane_blocks, uv_plane_blocks;

total: 0 errors, 0 warnings, 3 checks, 293 lines checked
e8d4aa625cc3 drm/i915/skl+: add NV12 in skl_format_to_fourcc
f995dc9b92e0 drm/i915/skl+: support verification of DDB HW state for NV12
a41cb6ea7434 drm/i915/skl+: NV12 related changes for WM
c1d175ff311e drm/i915/skl+: pass skl_wm_level struct to wm compute func
63822fee142a drm/i915/skl+: make sure higher latency level has higher wm value
59a9d6928dbf drm/i915/skl+: nv12 workaround disable WM level 1-7
-:32: CHECK: Unnecessary parentheses around 'level >= 1'
#32: FILE: drivers/gpu/drm/i915/intel_pm.c:4663:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:33: CHECK: Alignment should match open parenthesis
#33: FILE: drivers/gpu/drm/i915/intel_pm.c:4664:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
1b76997e221e drm/i915/skl: split skl_compute_ddb function
-:111: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#111: FILE: drivers/gpu/drm/i915/intel_pm.c:5140:
+	uint32_t realloc_pipes = pipes_modified(state);

-:130: CHECK: spaces preferred around that '*' (ctx:ExV)
#130: FILE: drivers/gpu/drm/i915/intel_pm.c:5159:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
03a7f4c2c145 drm/i915: Set scaler mode for NV12
-:55: CHECK: Prefer using the BIT macro
#55: FILE: drivers/gpu/drm/i915/i915_reg.h:6735:
+#define PS_SCALER_MODE_PLANAR (1 << 29)

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
3a9703128148 drm/i915: Update format_is_yuv() to include NV12
01f0c6f70548 drm/i915: Upscale scaler max scale for NV12
-:146: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#146: FILE: drivers/gpu/drm/i915/intel_display.c:12836:
+	uint32_t pixel_format = 0;

total: 0 errors, 0 warnings, 1 checks, 119 lines checked
f1903a03f713 drm/i915: Add NV12 as supported format for primary plane
-:57: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#57: FILE: drivers/gpu/drm/i915/intel_display.c:13259:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

-:58: CHECK: Alignment should match open parenthesis
#58: FILE: drivers/gpu/drm/i915/intel_display.c:13260:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
ae5ae7ff03c9 drm/i915: Add NV12 as supported format for sprite plane
-:71: CHECK: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/intel_sprite.c:1374:
+		if ((INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) &&
+		    (plane != 0 || pipe == PIPE_C)) ||

total: 0 errors, 0 warnings, 1 checks, 19 lines checked
ce89283213c8 drm/i915: Add NV12 support to intel_framebuffer_init
-:61: WARNING: line over 80 characters
#61: FILE: drivers/gpu/drm/i915/intel_display.c:14069:
+				      drm_get_format_name(mode_cmd->pixel_format,

-:62: CHECK: Alignment should match open parenthesis
#62: FILE: drivers/gpu/drm/i915/intel_display.c:14070:
+				      drm_get_format_name(mode_cmd->pixel_format,
+				      &format_name));

total: 0 errors, 1 warnings, 1 checks, 14 lines checked
cbd0c912abc5 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:21: CHECK: Prefer using the BIT macro
#21: FILE: drivers/gpu/drm/i915/i915_reg.h:6458:
+#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709	(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
Test kms_color:
        Subgroup pipe-a-degamma:
                pass       -> FAIL       (shard-apl) fdo#104782
Test kms_plane_scaling:
        Subgroup pipe-b-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
        Subgroup pipe-a-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
Test kms_flip:
        Subgroup plain-flip-ts-check:
                pass       -> FAIL       (shard-snb) fdo#100368
Test kms_plane_lowres:
        Subgroup pipe-a-tiling-yf:
                fail       -> PASS       (shard-apl)
Test kms_setmode:
        Subgroup basic:
                pass       -> FAIL       (shard-hsw) fdo#99912
Test perf:
        Subgroup oa-exponents:
                fail       -> PASS       (shard-apl) fdo#102254
        Subgroup polling:
                pass       -> FAIL       (shard-hsw) fdo#102252
Test perf_pmu:
        Subgroup busy-start-vcs0:
                fail       -> PASS       (shard-snb)
Test kms_sysfs_edid_timing:
                warn       -> PASS       (shard-apl) fdo#100047

fdo#104782 https://bugs.freedesktop.org/show_bug.cgi?id=104782
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
fdo#102254 https://bugs.freedesktop.org/show_bug.cgi?id=102254
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047

shard-apl        total:3346 pass:1734 dwarn:3   dfail:0   fail:22  skip:1586 time:13990s
shard-hsw        total:3427 pass:1757 dwarn:1   dfail:0   fail:12  skip:1656 time:14635s
shard-snb        total:3427 pass:1347 dwarn:1   dfail:0   fail:11  skip:2068 time:7595s
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
-drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
+     ^~
+        ^~
-drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
-drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_pm.c:4656:19: error: no member 'is_nv12' in struct skl_plane_wm
+drivers/gpu/drm/i915/intel_pm.c:4656:19: warning: generating address of non-lvalue (8)
+drivers/gpu/drm/i915/intel_pm.c:4656:5: error: ‘struct skl_plane_wm’ has no member named ‘is_nv12’
+drivers/gpu/drm/i915/intel_pm.c:4834:15: error: no member 'is_nv12' in struct skl_plane_wm
+drivers/gpu/drm/i915/intel_pm.c:4834:15: warning: unknown expression (8 46)
+drivers/gpu/drm/i915/intel_pm.c:4834:8: error: ‘const struct skl_plane_wm’ has no member named ‘is_nv12’
+drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_compute_wm_levels’:
+drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_write_plane_wm’:
+  if (wm->is_nv12) {
+make[1]: *** [drivers/gpu/drm/i915] Error 2
+make[2]: *** [drivers/gpu/drm/i915/intel_pm.o] Error 1
+make[2]: *** Waiting for unfinished jobs....
+make[2]: *** wait: No child processes.  Stop.
+make: *** [drivers/gpu/drm/] Error 2
+   wm->is_nv12 = true;

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
-drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
-drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
-drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
-     ^~
-        ^~
+drivers/gpu/drm/i915/gvt/mmio.c:256:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/gvt/mmio.c:257:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1366:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1424:15: warning: memset with byte count of 16777216
-O:drivers/gpu/drm/i915/intel_pm.c:4687:19: error: no member 'is_nv12' in struct skl_plane_wm
-O:drivers/gpu/drm/i915/intel_pm.c:4687:19: warning: generating address of non-lvalue (8)
-O:drivers/gpu/drm/i915/intel_pm.c:4687:5: error: ‘struct skl_plane_wm’ has no member named ‘is_nv12’
-O:drivers/gpu/drm/i915/intel_pm.c:4865:15: error: no member 'is_nv12' in struct skl_plane_wm
-O:drivers/gpu/drm/i915/intel_pm.c:4865:15: warning: unknown expression (8 46)
-O:drivers/gpu/drm/i915/intel_pm.c:4865:8: error: ‘const struct skl_plane_wm’ has no member named ‘is_nv12’
-drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_compute_wm_levels’:
-drivers/gpu/drm/i915/intel_pm.c: In function ‘skl_write_plane_wm’:
-  if (wm->is_nv12) {
-make[1]: *** [drivers/gpu/drm/i915] Error 2
-make[2]: *** [drivers/gpu/drm/i915/intel_pm.o] Error 1
-make[2]: *** Waiting for unfinished jobs....
-make[2]: *** wait: No child processes.  Stop.
-make: *** [drivers/gpu/drm/] Error 2
-   wm->is_nv12 = true;

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!

Patches download mbox

Tests

Series 28103v11 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/11/mbox/

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:421s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:437s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:377s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:493s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:290s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:482s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:490s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:474s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:460s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:562s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:425s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:284s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:512s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:392s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:418s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:462s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:459s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:501s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:499s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:429s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:510s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:527s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:491s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:503s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:421s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:433s
fi-snb-2520m     total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:534s
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:402s
Blacklisted hosts:
fi-glk-dsi       total:288  pass:257  dwarn:0   dfail:0   fail:1   skip:30  time:471s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:453s

bd16af128e78b302b3034fa85626cd15dcf5f038 drm-tip: 2018y-02m-15d-00h-22m-40s UTC integration manifest
73fc8d1b6c6d drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
89079bc4387f drm/i915: Add NV12 support to intel_framebuffer_init
8af57462c087 drm/i915: Add NV12 as supported format for sprite plane
d0963cca44dc drm/i915: Add NV12 as supported format for primary plane
324f59e963ba drm/i915: Upscale scaler max scale for NV12
dd3dd77c470f drm/i915: Update format_is_yuv() to include NV12
84cdc8baa7b5 drm/i915: Set scaler mode for NV12
1597eed1bfce drm/i915/skl: split skl_compute_ddb function
ddeb5ee29a07 drm/i915/skl+: nv12 workaround disable WM level 1-7
d39c38f18583 drm/i915/skl+: make sure higher latency level has higher wm value
2b6dd34bd24d drm/i915/skl+: pass skl_wm_level struct to wm compute func
85e76858a77d drm/i915/skl+: NV12 related changes for WM
a99e0fac3589 drm/i915/skl+: support verification of DDB HW state for NV12
9e1c34f78b19 drm/i915/skl+: add NV12 in skl_format_to_fourcc
d2c46181e2bc drm/i915/skl+: refactor WM calculation for NV12
fdd5c40f60cb drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
fdd5c40f60cb drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_pm.c:5049:
+skl_copy_ddb_for_pipe(struct skl_ddb_values *dst,
+		     struct skl_ddb_values *src,

total: 0 errors, 0 warnings, 1 checks, 68 lines checked
d2c46181e2bc drm/i915/skl+: refactor WM calculation for NV12
-:180: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#180: FILE: drivers/gpu/drm/i915/intel_pm.c:4165:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:198: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#198: FILE: drivers/gpu/drm/i915/intel_pm.c:4198:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:247: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#247: FILE: drivers/gpu/drm/i915/intel_pm.c:4262:
+		uint16_t plane_blocks, uv_plane_blocks;

total: 0 errors, 0 warnings, 3 checks, 293 lines checked
9e1c34f78b19 drm/i915/skl+: add NV12 in skl_format_to_fourcc
a99e0fac3589 drm/i915/skl+: support verification of DDB HW state for NV12
85e76858a77d drm/i915/skl+: NV12 related changes for WM
2b6dd34bd24d drm/i915/skl+: pass skl_wm_level struct to wm compute func
d39c38f18583 drm/i915/skl+: make sure higher latency level has higher wm value
ddeb5ee29a07 drm/i915/skl+: nv12 workaround disable WM level 1-7
-:34: CHECK: Unnecessary parentheses around 'level >= 1'
#34: FILE: drivers/gpu/drm/i915/intel_pm.c:4664:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||
+		 IS_CNL_REVID(dev_priv, CNL_REVID_A0, CNL_REVID_A0))) {

-:35: CHECK: Alignment should match open parenthesis
#35: FILE: drivers/gpu/drm/i915/intel_pm.c:4665:
+	if (wp->is_planar && (level >= 1) &&
+		(IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
1597eed1bfce drm/i915/skl: split skl_compute_ddb function
-:113: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#113: FILE: drivers/gpu/drm/i915/intel_pm.c:5144:
+	uint32_t realloc_pipes = pipes_modified(state);

-:132: CHECK: spaces preferred around that '*' (ctx:ExV)
#132: FILE: drivers/gpu/drm/i915/intel_pm.c:5163:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
84cdc8baa7b5 drm/i915: Set scaler mode for NV12
-:55: CHECK: Prefer using the BIT macro
#55: FILE: drivers/gpu/drm/i915/i915_reg.h:6735:
+#define PS_SCALER_MODE_PLANAR (1 << 29)

total: 0 errors, 0 warnings, 1 checks, 21 lines checked
dd3dd77c470f drm/i915: Update format_is_yuv() to include NV12
324f59e963ba drm/i915: Upscale scaler max scale for NV12
-:146: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#146: FILE: drivers/gpu/drm/i915/intel_display.c:12836:
+	uint32_t pixel_format = 0;

total: 0 errors, 0 warnings, 1 checks, 119 lines checked
d0963cca44dc drm/i915: Add NV12 as supported format for primary plane
-:57: CHECK: Unnecessary parentheses around 'pipe == PIPE_C'
#57: FILE: drivers/gpu/drm/i915/intel_display.c:13259:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

-:58: CHECK: Alignment should match open parenthesis
#58: FILE: drivers/gpu/drm/i915/intel_display.c:13260:
+		if ((INTEL_GEN(dev_priv) == 9 && (pipe == PIPE_C)) &&
+			!IS_GEMINILAKE(dev_priv))

total: 0 errors, 0 warnings, 2 checks, 17 lines checked
8af57462c087 drm/i915: Add NV12 as supported format for sprite plane
-:71: CHECK: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/intel_sprite.c:1374:
+		if ((INTEL_GEN(dev_priv) == 9 && !IS_GEMINILAKE(dev_priv) &&
+		    (plane != 0 || pipe == PIPE_C)) ||

total: 0 errors, 0 warnings, 1 checks, 19 lines checked
89079bc4387f drm/i915: Add NV12 support to intel_framebuffer_init
-:61: WARNING: line over 80 characters
#61: FILE: drivers/gpu/drm/i915/intel_display.c:14069:
+				      drm_get_format_name(mode_cmd->pixel_format,

-:62: CHECK: Alignment should match open parenthesis
#62: FILE: drivers/gpu/drm/i915/intel_display.c:14070:
+				      drm_get_format_name(mode_cmd->pixel_format,
+				      &format_name));

total: 0 errors, 1 warnings, 1 checks, 14 lines checked
73fc8d1b6c6d drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:21: CHECK: Prefer using the BIT macro
#21: FILE: drivers/gpu/drm/i915/i915_reg.h:6458:
+#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB709	(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
Test kms_flip:
        Subgroup dpms-vs-vblank-race:
                pass       -> DMESG-WARN (shard-hsw) fdo#103060
        Subgroup 2x-flip-vs-expired-vblank-interruptible:
                pass       -> FAIL       (shard-hsw) fdo#102887
        Subgroup plain-flip-fb-recreate:
                pass       -> FAIL       (shard-hsw) fdo#100368 +2
Test gem_exec_suspend:
        Subgroup basic-s3:
                skip       -> PASS       (shard-snb) fdo#103880
Test gem_eio:
        Subgroup in-flight-contexts:
                pass       -> DMESG-WARN (shard-snb) fdo#104058
Test kms_plane:
        Subgroup pixel-format-pipe-b-planes:
                pass       -> DMESG-WARN (shard-apl)
Test perf:
        Subgroup enable-disable:
                fail       -> PASS       (shard-apl) fdo#103715
Test kms_plane_scaling:
        Subgroup pipe-b-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
        Subgroup pipe-a-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
Test gem_exec_schedule:
        Subgroup preempt-other-render:
                pass       -> FAIL       (shard-apl) fdo#102848
Test gem_softpin:
        Subgroup noreloc-s3:
                pass       -> INCOMPLETE (shard-hsw) fdo#103540

fdo#103060 https://bugs.freedesktop.org/show_bug.cgi?id=103060
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103880 https://bugs.freedesktop.org/show_bug.cgi?id=103880
fdo#104058 https://bugs.freedesktop.org/show_bug.cgi?id=104058
fdo#103715 https://bugs.freedesktop.org/show_bug.cgi?id=103715
fdo#102848 https://bugs.freedesktop.org/show_bug.cgi?id=102848
fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540

shard-apl        total:3342 pass:1725 dwarn:4   dfail:0   fail:20  skip:1592 time:13811s
shard-hsw        total:3385 pass:1732 dwarn:2   dfail:0   fail:14  skip:1635 time:14160s
shard-snb        total:3427 pass:1348 dwarn:2   dfail:0   fail:10  skip:2067 time:7579s
Blacklisted hosts:
shard-kbl        total:3427 pass:1907 dwarn:3   dfail:0   fail:21  skip:1496 time:11148s
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
Okay!

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
Okay!

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
Okay!

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!

Patches download mbox

Tests

Series 28103v12 Adding NV12 support
https://patchwork.freedesktop.org/api/1.0/series/28103/revisions/12/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> INCOMPLETE (fi-snb-2520m) fdo#103713

fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713

fi-bdw-5557u     total:288  pass:267  dwarn:0   dfail:0   fail:0   skip:21  time:415s
fi-bdw-gvtdvm    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:422s
fi-blb-e6850     total:288  pass:223  dwarn:1   dfail:0   fail:0   skip:64  time:373s
fi-bsw-n3050     total:288  pass:242  dwarn:0   dfail:0   fail:0   skip:46  time:486s
fi-bwr-2160      total:288  pass:183  dwarn:0   dfail:0   fail:0   skip:105 time:283s
fi-bxt-dsi       total:288  pass:258  dwarn:0   dfail:0   fail:0   skip:30  time:476s
fi-bxt-j4205     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:478s
fi-byt-j1900     total:288  pass:253  dwarn:0   dfail:0   fail:0   skip:35  time:465s
fi-byt-n2820     total:288  pass:249  dwarn:0   dfail:0   fail:0   skip:39  time:454s
fi-cfl-s2        total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:554s
fi-elk-e7500     total:288  pass:229  dwarn:0   dfail:0   fail:0   skip:59  time:412s
fi-gdg-551       total:288  pass:179  dwarn:0   dfail:0   fail:1   skip:108 time:281s
fi-glk-1         total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:508s
fi-hsw-4770      total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:384s
fi-ilk-650       total:288  pass:228  dwarn:0   dfail:0   fail:0   skip:60  time:409s
fi-ivb-3520m     total:288  pass:259  dwarn:0   dfail:0   fail:0   skip:29  time:454s
fi-ivb-3770      total:288  pass:255  dwarn:0   dfail:0   fail:0   skip:33  time:411s
fi-kbl-7500u     total:288  pass:263  dwarn:1   dfail:0   fail:0   skip:24  time:450s
fi-kbl-7560u     total:288  pass:269  dwarn:0   dfail:0   fail:0   skip:19  time:489s
fi-kbl-7567u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:450s
fi-kbl-r         total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:492s
fi-pnv-d510      total:288  pass:222  dwarn:1   dfail:0   fail:0   skip:65  time:586s
fi-skl-6260u     total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:436s
fi-skl-6600u     total:288  pass:261  dwarn:0   dfail:0   fail:0   skip:27  time:499s
fi-skl-6700hq    total:288  pass:262  dwarn:0   dfail:0   fail:0   skip:26  time:518s
fi-skl-6700k2    total:288  pass:264  dwarn:0   dfail:0   fail:0   skip:24  time:483s
fi-skl-6770hq    total:288  pass:268  dwarn:0   dfail:0   fail:0   skip:20  time:472s
fi-skl-guc       total:288  pass:260  dwarn:0   dfail:0   fail:0   skip:28  time:408s
fi-skl-gvtdvm    total:288  pass:265  dwarn:0   dfail:0   fail:0   skip:23  time:427s
fi-snb-2520m     total:245  pass:211  dwarn:0   dfail:0   fail:0   skip:33 
fi-snb-2600      total:288  pass:248  dwarn:0   dfail:0   fail:0   skip:40  time:390s

75f20d94e9a1fdc486867a8f5bebe433b119f531 drm-tip: 2018y-02m-21d-07h-35m-14s UTC integration manifest
26664b13b281 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
a9e9ba5791b7 drm/i915: Add NV12 support to intel_framebuffer_init
c2060bb9afa8 drm/i915: Add NV12 as supported format for sprite plane
b804cd678b39 drm/i915: Add NV12 as supported format for primary plane
18c91d98376c drm/i915: Upscale scaler max scale for NV12
80d7e4fdc8e1 drm/i915: Update format_is_yuv() to include NV12
debb41aa8125 drm/i915: Set scaler mode for NV12
739a92a9f739 drm/i915/skl: split skl_compute_ddb function
1799584a0027 drm/i915/skl+: nv12 workaround disable WM level 1-7
f9d74e780509 drm/i915/skl+: make sure higher latency level has higher wm value
7f7db5c9f0a5 drm/i915/skl+: pass skl_wm_level struct to wm compute func
d81bfc5007a6 drm/i915/skl+: NV12 related changes for WM
3c482886a3e0 drm/i915/skl+: support verification of DDB HW state for NV12
8cc4ae0ab64a drm/i915/skl+: add NV12 in skl_format_to_fourcc
2f18b9726ab8 drm/i915/skl+: refactor WM calculation for NV12
bcaef9063e6b drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
$ dim checkpatch origin/drm-tip
bcaef9063e6b drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
2f18b9726ab8 drm/i915/skl+: refactor WM calculation for NV12
-:180: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#180: FILE: drivers/gpu/drm/i915/intel_pm.c:4161:
+		 uint16_t *minimum, uint16_t *uv_minimum)

-:198: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#198: FILE: drivers/gpu/drm/i915/intel_pm.c:4194:
+	uint16_t uv_minimum[I915_MAX_PLANES] = {};

-:247: CHECK: Prefer kernel type 'u16' over 'uint16_t'
#247: FILE: drivers/gpu/drm/i915/intel_pm.c:4258:
+		uint16_t plane_blocks, uv_plane_blocks;

total: 0 errors, 0 warnings, 3 checks, 293 lines checked
8cc4ae0ab64a drm/i915/skl+: add NV12 in skl_format_to_fourcc
3c482886a3e0 drm/i915/skl+: support verification of DDB HW state for NV12
d81bfc5007a6 drm/i915/skl+: NV12 related changes for WM
7f7db5c9f0a5 drm/i915/skl+: pass skl_wm_level struct to wm compute func
f9d74e780509 drm/i915/skl+: make sure higher latency level has higher wm value
1799584a0027 drm/i915/skl+: nv12 workaround disable WM level 1-7
739a92a9f739 drm/i915/skl: split skl_compute_ddb function
-:113: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#113: FILE: drivers/gpu/drm/i915/intel_pm.c:5141:
+	uint32_t realloc_pipes = pipes_modified(state);

-:132: CHECK: spaces preferred around that '*' (ctx:ExV)
#132: FILE: drivers/gpu/drm/i915/intel_pm.c:5160:
+		*changed = true;
 		^

total: 0 errors, 0 warnings, 2 checks, 194 lines checked
debb41aa8125 drm/i915: Set scaler mode for NV12
-:61: CHECK: Prefer using the BIT macro
#61: FILE: drivers/gpu/drm/i915/i915_reg.h:6736:
+#define PS_SCALER_MODE_PLANAR (1 << 29)

total: 0 errors, 0 warnings, 1 checks, 27 lines checked
80d7e4fdc8e1 drm/i915: Update format_is_yuv() to include NV12
18c91d98376c drm/i915: Upscale scaler max scale for NV12
-:152: CHECK: Prefer kernel type 'u32' over 'uint32_t'
#152: FILE: drivers/gpu/drm/i915/intel_display.c:12860:
+	uint32_t pixel_format = 0;

total: 0 errors, 0 warnings, 1 checks, 119 lines checked
b804cd678b39 drm/i915: Add NV12 as supported format for primary plane
c2060bb9afa8 drm/i915: Add NV12 as supported format for sprite plane
a9e9ba5791b7 drm/i915: Add NV12 support to intel_framebuffer_init
-:64: WARNING: line over 80 characters
#64: FILE: drivers/gpu/drm/i915/intel_display.c:14096:
+				      drm_get_format_name(mode_cmd->pixel_format,

-:65: CHECK: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/intel_display.c:14097:
+				      drm_get_format_name(mode_cmd->pixel_format,
+				      &format_name));

total: 0 errors, 1 warnings, 1 checks, 14 lines checked
26664b13b281 drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
-:27: CHECK: Prefer using the BIT macro
#27: FILE: drivers/gpu/drm/i915/i915_reg.h:6458:
+#define   PLANE_COLOR_YUV601_TO_RGB709		(1 << 17)

total: 0 errors, 0 warnings, 1 checks, 20 lines checked
Test kms_plane_scaling:
        Subgroup pipe-b-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
        Subgroup pipe-c-scaler-with-rotation:
                pass       -> DMESG-WARN (shard-apl)
        Subgroup pipe-c-scaler-with-pixel-format:
                pass       -> DMESG-WARN (shard-apl) fdo#104727
Test kms_plane:
        Subgroup pixel-format-pipe-c-planes:
                pass       -> DMESG-WARN (shard-apl)
Test kms_flip:
        Subgroup 2x-plain-flip-fb-recreate:
                pass       -> FAIL       (shard-hsw) fdo#100368 +1
        Subgroup 2x-flip-vs-expired-vblank-interruptible:
                fail       -> PASS       (shard-hsw) fdo#102887
Test kms_chv_cursor_fail:
        Subgroup pipe-b-64x64-bottom-edge:
                dmesg-warn -> PASS       (shard-snb) fdo#105185
Test kms_sysfs_edid_timing:
                pass       -> WARN       (shard-apl) fdo#100047

fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887
fdo#105185 https://bugs.freedesktop.org/show_bug.cgi?id=105185
fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047

shard-apl        total:3367 pass:1760 dwarn:5   dfail:0   fail:8   skip:1592 time:11996s
shard-hsw        total:3429 pass:1757 dwarn:1   dfail:0   fail:5   skip:1665 time:11576s
shard-snb        total:3429 pass:1350 dwarn:1   dfail:0   fail:2   skip:2076 time:6548s
Blacklisted hosts:
shard-kbl        total:3429 pass:1889 dwarn:37  dfail:0   fail:10  skip:1493 time:9740s
$ dim sparse origin/drm-tip
Commit: drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values
Okay!

Commit: drm/i915/skl+: refactor WM calculation for NV12
Okay!

Commit: drm/i915/skl+: add NV12 in skl_format_to_fourcc
Okay!

Commit: drm/i915/skl+: support verification of DDB HW state for NV12
Okay!

Commit: drm/i915/skl+: NV12 related changes for WM
Okay!

Commit: drm/i915/skl+: pass skl_wm_level struct to wm compute func
Okay!

Commit: drm/i915/skl+: make sure higher latency level has higher wm value
Okay!

Commit: drm/i915/skl+: nv12 workaround disable WM level 1-7
Okay!

Commit: drm/i915/skl: split skl_compute_ddb function
Okay!

Commit: drm/i915: Set scaler mode for NV12
Okay!

Commit: drm/i915: Update format_is_yuv() to include NV12
Okay!

Commit: drm/i915: Upscale scaler max scale for NV12
Okay!

Commit: drm/i915: Add NV12 as supported format for primary plane
Okay!

Commit: drm/i915: Add NV12 as supported format for sprite plane
Okay!

Commit: drm/i915: Add NV12 support to intel_framebuffer_init
Okay!

Commit: drm/i915: Enable YUV to RGB for Gen10 in Plane Ctrl Reg
Okay!