[Mesa-dev,30/95] i965/vec4: add helpers for conversions to/from doubles

Submitted by Iago Toral Quiroga on July 19, 2016, 10:40 a.m.

Details

Message ID 1468924892-6910-31-git-send-email-itoral@igalia.com
State New
Headers show
Series "i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0" ( rev: 2 1 ) in Mesa

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Commit Message

Iago Toral Quiroga July 19, 2016, 10:40 a.m.
Use these helpers to implement d2f and f2d. We will reuse these helpers when
we implement things like d2i or i2d as well.
---
 src/mesa/drivers/dri/i965/brw_vec4.h       |  5 +++
 src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 53 +++++++++++++++++++-----------
 2 files changed, 38 insertions(+), 20 deletions(-)

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diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index afcf31e..4650ae0 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -315,6 +315,11 @@  public:
 
    bool optimize_predicate(nir_alu_instr *instr, enum brw_predicate *predicate);
 
+   void emit_double_to_single(dst_reg dst, src_reg src, bool saturate,
+                              brw_reg_type single_type);
+   void emit_single_to_double(dst_reg dst, src_reg src, bool saturate,
+                              brw_reg_type single_type);
+
    virtual void emit_nir_code();
    virtual void nir_setup_uniforms();
    virtual void nir_setup_system_value_intrinsic(nir_intrinsic_instr *instr);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 38c7322..15c829c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -1024,6 +1024,33 @@  vec4_visitor::optimize_predicate(nir_alu_instr *instr,
 }
 
 void
+vec4_visitor::emit_double_to_single(dst_reg dst, src_reg src, bool saturate,
+                                    brw_reg_type single_type)
+{
+   dst_reg temp = dst_reg(this, glsl_type::dvec4_type);
+   emit(MOV(temp, src));
+
+   dst_reg temp2 = dst_reg(this, glsl_type::dvec4_type);
+   temp2 = retype(temp2, single_type);
+   emit(VEC4_OPCODE_DOUBLE_TO_SINGLE, temp2, src_reg(temp))->regs_written = 2;
+
+   vec4_instruction *inst = emit(MOV(dst, src_reg(temp2)));
+   inst->saturate = saturate;
+}
+
+void
+vec4_visitor::emit_single_to_double(dst_reg dst, src_reg src, bool saturate,
+                                    brw_reg_type single_type)
+{
+   dst_reg tmp_dst = dst_reg(src_reg(this, glsl_type::dvec4_type));
+   src_reg tmp_src = retype(src_reg(this, glsl_type::vec4_type), single_type);
+   emit(MOV(dst_reg(tmp_src), retype(src, single_type)));
+   emit(VEC4_OPCODE_SINGLE_TO_DOUBLE, tmp_dst, tmp_src);
+   vec4_instruction *inst = emit(MOV(dst, src_reg(tmp_dst)));
+   inst->saturate = saturate;
+}
+
+void
 vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
 {
    vec4_instruction *inst;
@@ -1068,29 +1095,15 @@  vec4_visitor::nir_emit_alu(nir_alu_instr *instr)
       inst = emit(MOV(dst, op[0]));
       break;
 
-   case nir_op_d2f: {
-      dst_reg temp = dst_reg(this, glsl_type::dvec4_type);
-      emit(MOV(temp, op[0]));
-
-      dst_reg temp2 = dst_reg(this, glsl_type::dvec4_type);
-      temp2 = retype(temp2, BRW_REGISTER_TYPE_F);
-      emit(VEC4_OPCODE_DOUBLE_TO_SINGLE, temp2, src_reg(temp))
-         ->regs_written = 2;
-
-      vec4_instruction *inst = emit(MOV(dst, src_reg(temp2)));
-      inst->saturate = instr->dest.saturate;
+   case nir_op_d2f:
+      emit_double_to_single(dst, op[0], instr->dest.saturate,
+                            BRW_REGISTER_TYPE_F);
       break;
-   }
 
-   case nir_op_f2d: {
-      dst_reg tmp_dst = dst_reg(src_reg(this, glsl_type::dvec4_type));
-      src_reg tmp_src = src_reg(this, glsl_type::vec4_type);
-      emit(MOV(dst_reg(tmp_src), retype(op[0], BRW_REGISTER_TYPE_F)));
-      emit(VEC4_OPCODE_SINGLE_TO_DOUBLE, tmp_dst, tmp_src);
-      vec4_instruction *inst = emit(MOV(dst, src_reg(tmp_dst)));
-      inst->saturate = instr->dest.saturate;
+   case nir_op_f2d:
+      emit_single_to_double(dst, op[0], instr->dest.saturate,
+                            BRW_REGISTER_TYPE_F);
       break;
-   }
 
    case nir_op_iadd:
       assert(nir_dest_bit_size(instr->dest.dest) < 64);