[Mesa-dev,42/95] i965/vec4: dump NibCtrl for instructions with execsize 4

Submitted by Iago Toral Quiroga on July 19, 2016, 10:40 a.m.

Details

Message ID 1468924892-6910-43-git-send-email-itoral@igalia.com
State New
Headers show
Series "i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0" ( rev: 2 1 ) in Mesa

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Commit Message

Iago Toral Quiroga July 19, 2016, 10:40 a.m.
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +++
 1 file changed, 3 insertions(+)

Patch hide | download patch | download mbox

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 829b7d3..88bf895 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -1580,6 +1580,9 @@  vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
    if (inst->force_writemask_all)
       fprintf(file, " NoMask");
 
+   if (inst->exec_size == 4)
+      fprintf(file, "%s", inst->group == 0 ? " 1N" : " 2N");
+
    fprintf(file, "\n");
 }
 

Comments

Iago Toral Quiroga <itoral@igalia.com> writes:

> ---
>  src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> index 829b7d3..88bf895 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> @@ -1580,6 +1580,9 @@ vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE *file)
>     if (inst->force_writemask_all)
>        fprintf(file, " NoMask");
>  
> +   if (inst->exec_size == 4)
> +      fprintf(file, "%s", inst->group == 0 ? " 1N" : " 2N");
> +

In the FS back-end we do:

|   if (inst->exec_size != dispatch_width)
|         fprintf(file, "group%d ", inst->group);

Would it make sense to have the vec4 back-end behave the same way for
consistency? (with dispatch_width equal to 8)

>     fprintf(file, "\n");
>  }
>  
> -- 
> 2.7.4
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
On Mon, 2016-08-08 at 15:30 -0700, Francisco Jerez wrote:
> Iago Toral Quiroga <itoral@igalia.com> writes:
> 
> > 
> > ---
> >  src/mesa/drivers/dri/i965/brw_vec4.cpp | 3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > index 829b7d3..88bf895 100644
> > --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
> > @@ -1580,6 +1580,9 @@
> > vec4_visitor::dump_instruction(backend_instruction *be_inst, FILE
> > *file)
> >     if (inst->force_writemask_all)
> >        fprintf(file, " NoMask");
> >  
> > +   if (inst->exec_size == 4)
> > +      fprintf(file, "%s", inst->group == 0 ? " 1N" : " 2N");
> > +
> In the FS back-end we do:
> 
> > 
> >   if (inst->exec_size != dispatch_width)
> >         fprintf(file, "group%d ", inst->group);
> Would it make sense to have the vec4 back-end behave the same way for
> consistency? (with dispatch_width equal to 8)

Yeah, I had noticed the difference I intended to fix it, but I forgot
about it, thanks for reminding me, we should really try to have
consistent outputs.

I have the same doubt I mentioned in the same patch for the disassembly
(patch 43) regarding whether we should show this for any exec_size != 4
though.

Iago

> > 
> >     fprintf(file, "\n");
> >  }
> >