[Mesa-dev,78/95] i965/vec4: fix move_uniform_array_access_to_pull_constant() for 64-bit data

Submitted by Iago Toral Quiroga on July 19, 2016, 10:41 a.m.

Details

Message ID 1468924892-6910-79-git-send-email-itoral@igalia.com
State New
Headers show
Series "i965 Haswell ARB_gpu_shader_fp64 / OpenGL 4.0" ( rev: 2 1 ) in Mesa

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Commit Message

Iago Toral Quiroga July 19, 2016, 10:41 a.m.
---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

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diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 441a450..40ba648 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1792,8 +1792,23 @@  vec4_visitor::move_uniform_array_access_to_pull_constants()
 
       assert(inst->src[0].swizzle == BRW_SWIZZLE_NOOP);
 
-      emit_pull_constant_load(block, inst, inst->dst, inst->src[0],
-                              pull_constant_loc[uniform_nr], inst->src[1]);
+      if (type_sz(inst->src[0].type) != 8) {
+         emit_pull_constant_load(block, inst, inst->dst, inst->src[0],
+                                 pull_constant_loc[uniform_nr], inst->src[1]);
+      } else {
+         dst_reg shuffled = dst_reg(this, glsl_type::dvec4_type);
+         dst_reg shuffled_float = retype(shuffled, BRW_REGISTER_TYPE_F);
+
+         emit_pull_constant_load(block, inst, shuffled_float, inst->src[0],
+                                 pull_constant_loc[uniform_nr], inst->src[1]);
+         emit_pull_constant_load(block, inst, offset(shuffled_float, 1),
+                                 offset(inst->src[0], 1),
+                                 pull_constant_loc[uniform_nr], inst->src[1]);
+
+         shuffle_64bit_data(retype(inst->dst, BRW_REGISTER_TYPE_DF),
+                            src_reg(shuffled), false, block, inst);
+      }
+
       inst->remove(block);
    }