[Mesa-dev,1/5] winsys/amdgpu: addrlib - add Polaris support

Submitted by Alex Deucher on March 23, 2016, 6:43 p.m.

Details

Message ID 1458758594-4512-1-git-send-email-alexander.deucher@amd.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Mesa

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Commit Message

Alex Deucher March 23, 2016, 6:43 p.m.
From: Sonny Jiang <sonny.jiang@amd.com>

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
---
 src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp |  8 +++++++-
 src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h   |  2 ++
 src/gallium/winsys/amdgpu/drm/amdgpu_id.h                | 10 +++++++++-
 3 files changed, 18 insertions(+), 2 deletions(-)

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diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
index 5702162..7c5d29a 100644
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.cpp
@@ -351,6 +351,8 @@  AddrChipFamily CIAddrLib::HwlConvertChipFamily(
             m_settings.isIceland         = ASICREV_IS_ICELAND_M(uChipRevision);
             m_settings.isTonga           = ASICREV_IS_TONGA_P(uChipRevision);
             m_settings.isFiji            = ASICREV_IS_FIJI_P(uChipRevision);
+            m_settings.isPolaris10       = ASICREV_IS_POLARIS10_P(uChipRevision);
+            m_settings.isPolaris11       = ASICREV_IS_POLARIS11_M(uChipRevision);
             break;
         case FAMILY_CZ:
             m_settings.isCarrizo         = 1;
@@ -403,7 +405,7 @@  BOOL_32 CIAddrLib::HwlInitGlobalParams(
 
     // @todo: VI
     // Move this to VI code path once created
-    if (m_settings.isTonga)
+    if (m_settings.isTonga || m_settings.isPolaris10)
     {
         m_pipes = 8;
     }
@@ -415,6 +417,10 @@  BOOL_32 CIAddrLib::HwlInitGlobalParams(
     {
         m_pipes = 16;
     }
+    else if (m_settings.isPolaris11)
+    {
+        m_pipes = 4;
+    }
 
     if (valid)
     {
diff --git a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
index 4cbe970..de995fa 100644
--- a/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
+++ b/src/gallium/winsys/amdgpu/drm/addrlib/r800/ciaddrlib.h
@@ -60,6 +60,8 @@  struct CIChipSettings
         UINT_32 isIceland         : 1;
         UINT_32 isTonga           : 1;
         UINT_32 isFiji            : 1;
+        UINT_32 isPolaris10       : 1;
+        UINT_32 isPolaris11       : 1;
         // VI fusion (Carrizo)
         UINT_32 isCarrizo         : 1;
     };
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
index 90fe0cd..b9e20b8 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
@@ -138,6 +138,10 @@  enum {
 
 	VI_FIJI_P_A0      = 60,
 
+        VI_POLARIS10_P_A0 = 80,
+
+        VI_POLARIS11_M_A0    = 90,
+
 	VI_UNKNOWN        = 0xFF
 };
 
@@ -147,7 +151,11 @@  enum {
 #define ASICREV_IS_TONGA_P(eChipRev)	\
 	((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0))
 #define ASICREV_IS_FIJI_P(eChipRev)	\
-	(eChipRev >= VI_FIJI_P_A0)
+        ((eChipRev >= VI_FIJI_P_A0)  && (eChipRev < VI_POLARIS10_P_A0))
+#define ASICREV_IS_POLARIS10_P(eChipRev)\
+        ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0))
+#define ASICREV_IS_POLARIS11_M(eChipRev)   \
+        (eChipRev >= VI_POLARIS11_M_A0)
 
 /* CZ specific rev IDs */
 enum {

Comments

On 24.03.2016 03:43, Alex Deucher wrote:
> 
> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
> index 90fe0cd..b9e20b8 100644
> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_id.h
> @@ -138,6 +138,10 @@ enum {
>  
>  	VI_FIJI_P_A0      = 60,
>  
> +        VI_POLARIS10_P_A0 = 80,
> +
> +        VI_POLARIS11_M_A0    = 90,
> +
>  	VI_UNKNOWN        = 0xFF
>  };
>  
> @@ -147,7 +151,11 @@ enum {
>  #define ASICREV_IS_TONGA_P(eChipRev)	\
>  	((eChipRev >= VI_TONGA_P_A0) && (eChipRev < VI_FIJI_P_A0))
>  #define ASICREV_IS_FIJI_P(eChipRev)	\
> -	(eChipRev >= VI_FIJI_P_A0)
> +        ((eChipRev >= VI_FIJI_P_A0)  && (eChipRev < VI_POLARIS10_P_A0))
> +#define ASICREV_IS_POLARIS10_P(eChipRev)\
> +        ((eChipRev >= VI_POLARIS10_P_A0) && (eChipRev < VI_POLARIS11_M_A0))
> +#define ASICREV_IS_POLARIS11_M(eChipRev)   \
> +        (eChipRev >= VI_POLARIS11_M_A0)
>  
>  /* CZ specific rev IDs */
>  enum {
> 

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