[05/15] Backend: Add threadid as a curbe register.

Submitted by Pan Xiuli on Jan. 21, 2016, 6:51 a.m.

Details

Message ID 1453359115-28123-6-git-send-email-xiuli.pan@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 2 ) in Beignet

Not browsing as part of any series.

Commit Message

Pan Xiuli Jan. 21, 2016, 6:51 a.m.
From: Junyan He <junyan.he@linux.intel.com>

We need to build a map between logical workgroup thread and
real hw thread. This curbe will hold the logical workgroup thread
ID when it is executed on some HW thread.

Signed-off-by: Junyan He <junyan.he@linux.intel.com>
Reviewed-by: Yang Rong <rong.r.yang@intel.com>
---
 backend/src/backend/program.h  | 1 +
 backend/src/ir/instruction.cpp | 2 +-
 backend/src/ir/profile.cpp     | 4 +++-
 backend/src/ir/profile.hpp     | 3 ++-
 4 files changed, 7 insertions(+), 3 deletions(-)

Patch hide | download patch | download mbox

diff --git a/backend/src/backend/program.h b/backend/src/backend/program.h
index 86b3177..f6176db 100644
--- a/backend/src/backend/program.h
+++ b/backend/src/backend/program.h
@@ -99,6 +99,7 @@  enum gbe_curbe_type {
   GBE_CURBE_BLOCK_IP,
   GBE_CURBE_DW_BLOCK_IP,
   GBE_CURBE_THREAD_NUM,
+  GBE_CURBE_THREAD_ID,
   GBE_GEN_REG,
 };
 
diff --git a/backend/src/ir/instruction.cpp b/backend/src/ir/instruction.cpp
index afba05a..464e483 100644
--- a/backend/src/ir/instruction.cpp
+++ b/backend/src/ir/instruction.cpp
@@ -1304,7 +1304,7 @@  namespace ir {
         case WORKGROUP_OP_EXCLUSIVE_ADD:
         case WORKGROUP_OP_EXCLUSIVE_MIN:
         case WORKGROUP_OP_EXCLUSIVE_MAX:
-          if (this->srcNum != 1) {
+          if (this->srcNum != 3) {
             whyNot = "Wrong number of source.";
             return false;
           }
diff --git a/backend/src/ir/profile.cpp b/backend/src/ir/profile.cpp
index 3ead8a7..cfc4d21 100644
--- a/backend/src/ir/profile.cpp
+++ b/backend/src/ir/profile.cpp
@@ -43,7 +43,8 @@  namespace ir {
         "zero", "one",
         "retVal",
         "printf_buffer_pointer", "printf_index_buffer_pointer",
-        "dwblockip"
+        "dwblockip",
+        "threadid"
     };
 
 #if GBE_DEBUG
@@ -86,6 +87,7 @@  namespace ir {
       DECL_NEW_REG(FAMILY_QWORD, printfbptr, 1, GBE_CURBE_PRINTF_BUF_POINTER);
       DECL_NEW_REG(FAMILY_QWORD, printfiptr, 1, GBE_CURBE_PRINTF_INDEX_POINTER);
       DECL_NEW_REG(FAMILY_DWORD, dwblockip, 0, GBE_CURBE_DW_BLOCK_IP);
+      DECL_NEW_REG(FAMILY_DWORD, threadid, 1, GBE_CURBE_THREAD_ID);
     }
 #undef DECL_NEW_REG
 
diff --git a/backend/src/ir/profile.hpp b/backend/src/ir/profile.hpp
index a8445c4..933fe3d 100644
--- a/backend/src/ir/profile.hpp
+++ b/backend/src/ir/profile.hpp
@@ -71,7 +71,8 @@  namespace ir {
     static const Register printfbptr = Register(27); // printf buffer address .
     static const Register printfiptr = Register(28); // printf index buffer address.
     static const Register dwblockip = Register(29);  // blockip
-    static const uint32_t regNum = 30;             // number of special registers
+    static const Register threadid = Register(30); // the thread id of this thread.
+    static const uint32_t regNum = 31;             // number of special registers
     extern const char *specialRegMean[];           // special register name.
   } /* namespace ocl */