SKL: Use kernel-defined MOCS values instead of assuming hardware defaults.

Submitted by Francisco Jerez on Dec. 4, 2015, 1:34 p.m.

Details

Message ID 1449236054-14578-1-git-send-email-currojerez@riseup.net
State New
Headers show
Series "SKL: Use kernel-defined MOCS values instead of assuming hardware defaults." ( rev: 1 ) in Beignet

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Commit Message

Francisco Jerez Dec. 4, 2015, 1:34 p.m.
Reported to fix fix a ~50% performance regression (in OpenCV 3.0 and
Luxmark 2.1 among others) with v4.3 kernels on Gen9 hardware.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92975
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
---
 src/intel/intel_gpgpu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Patch hide | download patch | download mbox

diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c
index 7f212e2..53a6dfc 100644
--- a/src/intel/intel_gpgpu.c
+++ b/src/intel/intel_gpgpu.c
@@ -285,9 +285,9 @@  intel_gpgpu_get_cache_ctrl_gen8()
 static uint32_t
 intel_gpgpu_get_cache_ctrl_gen9()
 {
-  //Pre-defined cache control registers 9:
+  //Kernel-defined cache control registers 2:
   //L3CC: WB; LeCC: WB; TC: LLC/eLLC;
-  return (0x9 << 1);
+  return (0x2 << 1);
 }
 
 static void

Comments

LGTM, pushed, thanks.

> -----Original Message-----

> From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of

> Francisco Jerez

> Sent: Friday, December 4, 2015 21:34

> To: beignet@lists.freedesktop.org

> Subject: [Beignet] [PATCH] SKL: Use kernel-defined MOCS values instead of

> assuming hardware defaults.

> 

> Reported to fix fix a ~50% performance regression (in OpenCV 3.0 and

> Luxmark 2.1 among others) with v4.3 kernels on Gen9 hardware.

> 

> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92975

> Signed-off-by: Francisco Jerez <currojerez@riseup.net>

> ---

>  src/intel/intel_gpgpu.c | 4 ++--

>  1 file changed, 2 insertions(+), 2 deletions(-)

> 

> diff --git a/src/intel/intel_gpgpu.c b/src/intel/intel_gpgpu.c index

> 7f212e2..53a6dfc 100644

> --- a/src/intel/intel_gpgpu.c

> +++ b/src/intel/intel_gpgpu.c

> @@ -285,9 +285,9 @@ intel_gpgpu_get_cache_ctrl_gen8()  static uint32_t

>  intel_gpgpu_get_cache_ctrl_gen9()

>  {

> -  //Pre-defined cache control registers 9:

> +  //Kernel-defined cache control registers 2:

>    //L3CC: WB; LeCC: WB; TC: LLC/eLLC;

> -  return (0x9 << 1);

> +  return (0x2 << 1);

>  }

> 

>  static void

> --

> 2.5.1

> 

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