[8/8] drm/i915: Force loading of csr program at boot

Submitted by Patrik Jakobsson on Nov. 3, 2015, 12:31 p.m.

Details

Message ID 1446553874-22986-9-git-send-email-patrik.jakobsson@linux.intel.com
State New
Headers show
Series "Skylake DMC/DC-state fixes and redesign" ( rev: 2 1 ) in Intel GFX

Not browsing as part of any series.

Commit Message

Patrik Jakobsson Nov. 3, 2015, 12:31 p.m.
When booting (warm or cold) we must always program the csr. Previously
we checked if the CSR program memory matched with the firmware data but
this turned out to fail on warm boots.

Signed-off-by: Patrik Jakobsson <patrik.jakobsson@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c  | 2 +-
 drivers/gpu/drm/i915/intel_csr.c | 6 +++---
 drivers/gpu/drm/i915/intel_drv.h | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index e190237..7e08f3f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1114,7 +1114,7 @@  static int bxt_resume_prepare(struct drm_i915_private *dev_priv)
 static int skl_resume_prepare(struct drm_i915_private *dev_priv)
 {
 	skl_init_cdclk(dev_priv);
-	intel_csr_load_program(dev_priv);
+	intel_csr_load_program(dev_priv, false);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index ecb7c70..586ea55 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -210,7 +210,7 @@  static char intel_get_substepping(struct drm_device *dev)
  * Everytime display comes back from low power state this function is called to
  * copy the firmware from internal memory to registers.
  */
-void intel_csr_load_program(struct drm_i915_private *dev_priv)
+void intel_csr_load_program(struct drm_i915_private *dev_priv, bool force)
 {
 	u32 *payload = dev_priv->csr.dmc_payload;
 	uint32_t i, fw_size;
@@ -226,7 +226,7 @@  void intel_csr_load_program(struct drm_i915_private *dev_priv)
 	 * Unfortunately the ACPI subsystem doesn't yet give us a way to
 	 * differentiate this, hence figure it out with this hack.
 	 */
-	if ((!dev_priv->csr.dmc_payload) || I915_READ(CSR_PROGRAM(0)))
+	if (!force && (!dev_priv->csr.dmc_payload || I915_READ(CSR_PROGRAM(0))))
 		return;
 
 	fw_size = dev_priv->csr.dmc_fw_size;
@@ -384,7 +384,7 @@  static void csr_load_work_fn(struct work_struct *work)
 		goto out;
 
 	/* load csr program during system boot, as needed for DC states */
-	intel_csr_load_program(dev_priv);
+	intel_csr_load_program(dev_priv, true);
 
 out:
 	if (dev_priv->csr.dmc_payload) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d110555..58cd63a3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1208,7 +1208,7 @@  u32 skl_plane_ctl_rotation(unsigned int rotation);
 
 /* intel_csr.c */
 void intel_csr_ucode_init(struct drm_i915_private *);
-void intel_csr_load_program(struct drm_i915_private *);
+void intel_csr_load_program(struct drm_i915_private *, bool);
 void intel_csr_ucode_fini(struct drm_i915_private *);
 
 /* intel_dp.c */