GBE: fix a regression bug at post phi copy optimization.

Submitted by Meng, Mengmeng on Oct. 22, 2015, 1:22 a.m.

Details

Message ID D6491F03E58BBA469517B8539027FFB701FC63F9@SHSMSX103.ccr.corp.intel.com
State New
Headers show
Series "GBE: fix a regression bug at post phi copy optimization." ( rev: 1 ) in Beignet

Not browsing as part of any series.

Commit Message

Meng, Mengmeng Oct. 22, 2015, 1:22 a.m.
With the patch, it could be fixed a conformance issue in my side.

-----Original Message-----
From: Beignet [mailto:beignet-bounces@lists.freedesktop.org] On Behalf Of Zhigang Gong

Sent: Tuesday, October 20, 2015 4:07 PM
To: beignet@lists.freedesktop.org
Cc: Gong, Zhigang
Subject: [Beignet] [PATCH] GBE: fix a regression bug at post phi copy optimization.

Forgot to handle the undefined phi value set of BBs when we replace registers. This information will be used at next round DAG generation.

Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>

---
 backend/src/ir/liveness.cpp | 6 ++++++
 1 file changed, 6 insertions(+)

           info.varKill.erase(from);
           info.varKill.insert(to);
         }
+        if (bb->undefPhiRegs.contains(from)) {
+          bb->undefPhiRegs.erase(from);
+          bb->undefPhiRegs.insert(to);
+        }
       }
     }
   }
--
1.9.1

_______________________________________________
Beignet mailing list
Beignet@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/beignet

Patch hide | download patch | download mbox

diff --git a/backend/src/ir/liveness.cpp b/backend/src/ir/liveness.cpp index 414bf42..d48f067 100644
--- a/backend/src/ir/liveness.cpp
+++ b/backend/src/ir/liveness.cpp
@@ -82,6 +82,8 @@  namespace ir {
         if (info.liveOut.contains(from)) {
           info.liveOut.erase(from);
           info.liveOut.insert(to);
+          // FIXME, a hack method to avoid the "to" register be treated as
+          // uniform value.
           bb->definedPhiRegs.insert(to);
         }
         if (info.upwardUsed.contains(from)) { @@ -92,6 +94,10 @@ namespace ir {