[02/13] Backend: Redefine double register pattern.

Submitted by junyan.he@inbox.com on Sept. 18, 2015, 9:58 a.m.

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Message ID 1442570304-5754-3-git-send-email-junyan.he@inbox.com
State New
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Commit Message

junyan.he@inbox.com Sept. 18, 2015, 9:58 a.m.
From: Junyan He <junyan.he@linux.intel.com>

We redefine double register pattern from <8,8;1> to
<4,4;1>, which is the same as long type.
Accord to the document, the width of one register
should not span more than 1 register line.
<8,8;1>df is 64 bytes size and violate this rule.

Signed-off-by: Junyan He <junyan.he@linux.intel.com>
---
 backend/src/backend/gen_insn_selection.cpp | 2 +-
 backend/src/backend/gen_register.hpp       | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

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diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index ab00269..596d828 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -1111,7 +1111,7 @@  namespace gbe
       case FAMILY_DWORD: SEL_REG(f16grf, f8grf, f1grf); break;
       case FAMILY_QWORD:
         if (!this->hasLongType()) {
-          SEL_REG(df16grf, df8grf, df1grf);
+          SEL_REG(ud16grf, ud8grf, ud1grf);
         } else {
           SEL_REG(ul16grf, ul8grf, ul1grf);
         }
diff --git a/backend/src/backend/gen_register.hpp b/backend/src/backend/gen_register.hpp
index 69d156f..4d172b6 100644
--- a/backend/src/backend/gen_register.hpp
+++ b/backend/src/backend/gen_register.hpp
@@ -458,11 +458,11 @@  namespace gbe
     }
 
     static INLINE GenRegister df16(uint32_t file, ir::Register reg) {
-      return retype(vec16(file, reg), GEN_TYPE_DF);
+      return retype(vec4(file, reg), GEN_TYPE_DF);
     }
 
     static INLINE GenRegister df8(uint32_t file, ir::Register reg) {
-      return retype(vec8(file, reg), GEN_TYPE_DF);
+      return retype(vec4(file, reg), GEN_TYPE_DF);
     }
 
     static INLINE GenRegister df1(uint32_t file, ir::Register reg) {