[Mesa-dev,1/3] gallium/radeon: add separate stencil level dirty flags

Submitted by Marek Olšák on Sept. 6, 2015, 10:17 p.m.

Details

Message ID 1441577839-2636-1-git-send-email-maraeo@gmail.com
State New
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Commit Message

Marek Olšák Sept. 6, 2015, 10:17 p.m.
From: Marek Olšák <marek.olsak@amd.com>

We will only do depth-only or stencil-only decompress blits, whichever is
needed by textures, instead of always doing both.
---
 src/gallium/drivers/r600/evergreen_state.c    | 4 ++--
 src/gallium/drivers/r600/r600_state_common.c  | 3 +++
 src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
 src/gallium/drivers/radeonsi/cik_sdma.c       | 4 ++--
 src/gallium/drivers/radeonsi/si_dma.c         | 4 ++--
 src/gallium/drivers/radeonsi/si_state_draw.c  | 3 +++
 6 files changed, 13 insertions(+), 6 deletions(-)

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diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 6f4cb55..8ecc498 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3372,11 +3372,11 @@  static void evergreen_dma_copy(struct pipe_context *ctx,
 	}
 
 	if (src->format != dst->format || src_box->depth > 1 ||
-	    rdst->dirty_level_mask != 0) {
+	    (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
 		goto fallback;
 	}
 
-	if (rsrc->dirty_level_mask) {
+	if ((rsrc->dirty_level_mask | rsrc->stencil_dirty_level_mask) & (1 << src_level)) {
 		ctx->flush_resource(ctx, src);
 	}
 
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index ae13411..ebb347c 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1725,6 +1725,9 @@  static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
 		struct r600_texture *rtex = (struct r600_texture *)surf->texture;
 
 		rtex->dirty_level_mask |= 1 << surf->u.tex.level;
+
+		if (rtex->surface.flags & RADEON_SURF_SBUFFER)
+			rtex->stencil_dirty_level_mask |= 1 << surf->u.tex.level;
 	}
 	if (rctx->framebuffer.compressed_cb_mask) {
 		struct pipe_surface *surf;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 534b987..ee3d47f 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -204,6 +204,7 @@  struct r600_texture {
 	unsigned			pitch_override;
 	bool				is_depth;
 	unsigned			dirty_level_mask; /* each bit says if that mipmap is compressed */
+	unsigned			stencil_dirty_level_mask; /* each bit says if that mipmap is compressed */
 	struct r600_texture		*flushed_depth_texture;
 	boolean				is_flushing_texture;
 	struct radeon_surf		surface;
diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c b/src/gallium/drivers/radeonsi/cik_sdma.c
index 8b0ce9f..7334fcc 100644
--- a/src/gallium/drivers/radeonsi/cik_sdma.c
+++ b/src/gallium/drivers/radeonsi/cik_sdma.c
@@ -242,11 +242,11 @@  void cik_sdma_copy(struct pipe_context *ctx,
 
 	if (src->format != dst->format ||
 	    rdst->surface.nsamples > 1 || rsrc->surface.nsamples > 1 ||
-	    rdst->dirty_level_mask & (1 << dst_level)) {
+	    (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
 		goto fallback;
 	}
 
-	if (rsrc->dirty_level_mask & (1 << src_level)) {
+	if ((rsrc->dirty_level_mask | rsrc->stencil_dirty_level_mask) & (1 << src_level)) {
 		if (rsrc->htile_buffer)
 			goto fallback;
 
diff --git a/src/gallium/drivers/radeonsi/si_dma.c b/src/gallium/drivers/radeonsi/si_dma.c
index 309ae04..3babb7b 100644
--- a/src/gallium/drivers/radeonsi/si_dma.c
+++ b/src/gallium/drivers/radeonsi/si_dma.c
@@ -246,13 +246,13 @@  void si_dma_copy(struct pipe_context *ctx,
 	goto fallback;
 
 	if (src->format != dst->format || src_box->depth > 1 ||
-	    rdst->dirty_level_mask != 0 ||
+	    (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level) ||
 	    rdst->cmask.size || rdst->fmask.size ||
 	    rsrc->cmask.size || rsrc->fmask.size) {
 		goto fallback;
 	}
 
-	if (rsrc->dirty_level_mask) {
+	if ((rsrc->dirty_level_mask | rsrc->stencil_dirty_level_mask) & (1 << src_level)) {
 		ctx->flush_resource(ctx, src);
 	}
 
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 8cb98d7..684629c 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -852,6 +852,9 @@  void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 		struct r600_texture *rtex = (struct r600_texture *)surf->texture;
 
 		rtex->dirty_level_mask |= 1 << surf->u.tex.level;
+
+		if (rtex->surface.flags & RADEON_SURF_SBUFFER)
+			rtex->stencil_dirty_level_mask |= 1 << surf->u.tex.level;
 	}
 	if (sctx->framebuffer.compressed_cb_mask) {
 		struct pipe_surface *surf;

Comments

On 07.09.2015 07:17, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak@amd.com>
> 
> We will only do depth-only or stencil-only decompress blits, whichever is
> needed by textures, instead of always doing both.
> ---
>  src/gallium/drivers/r600/evergreen_state.c    | 4 ++--
>  src/gallium/drivers/r600/r600_state_common.c  | 3 +++
>  src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
>  src/gallium/drivers/radeonsi/cik_sdma.c       | 4 ++--
>  src/gallium/drivers/radeonsi/si_dma.c         | 4 ++--
>  src/gallium/drivers/radeonsi/si_state_draw.c  | 3 +++
>  6 files changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
> index 6f4cb55..8ecc498 100644
> --- a/src/gallium/drivers/r600/evergreen_state.c
> +++ b/src/gallium/drivers/r600/evergreen_state.c
> @@ -3372,11 +3372,11 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
>  	}
>  
>  	if (src->format != dst->format || src_box->depth > 1 ||
> -	    rdst->dirty_level_mask != 0) {
> +	    (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
>  		goto fallback;
>  	}
>  
> -	if (rsrc->dirty_level_mask) {
> +	if ((rsrc->dirty_level_mask | rsrc->stencil_dirty_level_mask) & (1 << src_level)) {
>  		ctx->flush_resource(ctx, src);
>  	}

AFAICT ctx->flush_resource only decompresses colour resources, so is the
second change really necessary? Same in si_dma_copy().


With that fixed, or if it's correct as is,

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
On Wed, Sep 9, 2015 at 10:07 AM, Michel Dänzer <michel@daenzer.net> wrote:
> On 07.09.2015 07:17, Marek Olšák wrote:
>> From: Marek Olšák <marek.olsak@amd.com>
>>
>> We will only do depth-only or stencil-only decompress blits, whichever is
>> needed by textures, instead of always doing both.
>> ---
>>  src/gallium/drivers/r600/evergreen_state.c    | 4 ++--
>>  src/gallium/drivers/r600/r600_state_common.c  | 3 +++
>>  src/gallium/drivers/radeon/r600_pipe_common.h | 1 +
>>  src/gallium/drivers/radeonsi/cik_sdma.c       | 4 ++--
>>  src/gallium/drivers/radeonsi/si_dma.c         | 4 ++--
>>  src/gallium/drivers/radeonsi/si_state_draw.c  | 3 +++
>>  6 files changed, 13 insertions(+), 6 deletions(-)
>>
>> diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
>> index 6f4cb55..8ecc498 100644
>> --- a/src/gallium/drivers/r600/evergreen_state.c
>> +++ b/src/gallium/drivers/r600/evergreen_state.c
>> @@ -3372,11 +3372,11 @@ static void evergreen_dma_copy(struct pipe_context *ctx,
>>       }
>>
>>       if (src->format != dst->format || src_box->depth > 1 ||
>> -         rdst->dirty_level_mask != 0) {
>> +         (rdst->dirty_level_mask | rdst->stencil_dirty_level_mask) & (1 << dst_level)) {
>>               goto fallback;
>>       }
>>
>> -     if (rsrc->dirty_level_mask) {
>> +     if ((rsrc->dirty_level_mask | rsrc->stencil_dirty_level_mask) & (1 << src_level)) {
>>               ctx->flush_resource(ctx, src);
>>       }
>
> AFAICT ctx->flush_resource only decompresses colour resources, so is the
> second change really necessary? Same in si_dma_copy().

Yes, you're right. I'll fix that.

Marek