[v6,09/19] drm/i915/gen8: Pass sg_iter through pte inserts

Submitted by Michel Thierry on July 29, 2015, 4:23 p.m.

Details

Message ID 1438187043-34267-10-git-send-email-michel.thierry@intel.com
State New
Headers show

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Commit Message

Michel Thierry July 29, 2015, 4:23 p.m.
As a step towards implementing 4 levels, while not discarding the
existing pte insert functions, we need to pass the sg_iter through.
The current function understands to the page directory granularity.
An object's pages may span the page directory, and so using the iter
directly as we write the PTEs allows the iterator to stay coherent
through a VMA insert operation spanning multiple page table levels.

v2: Rebase after s/page_tables/page_table/.
v3: Rebase after Mika's ppgtt cleanup / scratch merge patch series;
updated commit message (s/map/insert).

Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

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diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c6c8af7..7c024e98 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -749,7 +749,7 @@  static void gen8_ppgtt_clear_range(struct i915_address_space *vm,
 static void
 gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
 			      struct i915_page_directory_pointer *pdp,
-			      struct sg_table *pages,
+			      struct sg_page_iter *sg_iter,
 			      uint64_t start,
 			      enum i915_cache_level cache_level)
 {
@@ -759,11 +759,10 @@  gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
 	unsigned pdpe = start >> GEN8_PDPE_SHIFT & GEN8_PDPE_MASK;
 	unsigned pde = start >> GEN8_PDE_SHIFT & GEN8_PDE_MASK;
 	unsigned pte = start >> GEN8_PTE_SHIFT & GEN8_PTE_MASK;
-	struct sg_page_iter sg_iter;
 
 	pt_vaddr = NULL;
 
-	for_each_sg_page(pages->sgl, &sg_iter, pages->nents, 0) {
+	while (__sg_page_iter_next(sg_iter)) {
 		if (pt_vaddr == NULL) {
 			struct i915_page_directory *pd = pdp->page_directory[pdpe];
 			struct i915_page_table *pt = pd->page_table[pde];
@@ -771,7 +770,7 @@  gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
 		}
 
 		pt_vaddr[pte] =
-			gen8_pte_encode(sg_page_iter_dma_address(&sg_iter),
+			gen8_pte_encode(sg_page_iter_dma_address(sg_iter),
 					cache_level, true);
 		if (++pte == GEN8_PTES) {
 			kunmap_px(ppgtt, pt_vaddr);
@@ -797,8 +796,10 @@  static void gen8_ppgtt_insert_entries(struct i915_address_space *vm,
 	struct i915_hw_ppgtt *ppgtt =
 		container_of(vm, struct i915_hw_ppgtt, base);
 	struct i915_page_directory_pointer *pdp = &ppgtt->pdp; /* FIXME: 48b */
+	struct sg_page_iter sg_iter;
 
-	gen8_ppgtt_insert_pte_entries(vm, pdp, pages, start, cache_level);
+	__sg_page_iter_start(&sg_iter, pages->sgl, sg_nents(pages->sgl), 0);
+	gen8_ppgtt_insert_pte_entries(vm, pdp, &sg_iter, start, cache_level);
 }
 
 static void gen8_free_page_tables(struct drm_device *dev,

Comments

Reviewed the patch & it looks fine.
Reviewed-by: "Akash Goel <akash.goel@intel.com>"

On 7/29/2015 9:53 PM, Michel Thierry wrote:
> As a step towards implementing 4 levels, while not discarding the
> existing pte insert functions, we need to pass the sg_iter through.
> The current function understands to the page directory granularity.
> An object's pages may span the page directory, and so using the iter
> directly as we write the PTEs allows the iterator to stay coherent
> through a VMA insert operation spanning multiple page table levels.
>
> v2: Rebase after s/page_tables/page_table/.
> v3: Rebase after Mika's ppgtt cleanup / scratch merge patch series;
> updated commit message (s/map/insert).
>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
> ---
>   drivers/gpu/drm/i915/i915_gem_gtt.c | 11 ++++++-----
>   1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index c6c8af7..7c024e98 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -749,7 +749,7 @@ static void gen8_ppgtt_clear_range(struct i915_address_space *vm,
>   static void
>   gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
>   			      struct i915_page_directory_pointer *pdp,
> -			      struct sg_table *pages,
> +			      struct sg_page_iter *sg_iter,
>   			      uint64_t start,
>   			      enum i915_cache_level cache_level)
>   {
> @@ -759,11 +759,10 @@ gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
>   	unsigned pdpe = start >> GEN8_PDPE_SHIFT & GEN8_PDPE_MASK;
>   	unsigned pde = start >> GEN8_PDE_SHIFT & GEN8_PDE_MASK;
>   	unsigned pte = start >> GEN8_PTE_SHIFT & GEN8_PTE_MASK;
> -	struct sg_page_iter sg_iter;
>
>   	pt_vaddr = NULL;
>
> -	for_each_sg_page(pages->sgl, &sg_iter, pages->nents, 0) {
> +	while (__sg_page_iter_next(sg_iter)) {
>   		if (pt_vaddr == NULL) {
>   			struct i915_page_directory *pd = pdp->page_directory[pdpe];
>   			struct i915_page_table *pt = pd->page_table[pde];
> @@ -771,7 +770,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_address_space *vm,
>   		}
>
>   		pt_vaddr[pte] =
> -			gen8_pte_encode(sg_page_iter_dma_address(&sg_iter),
> +			gen8_pte_encode(sg_page_iter_dma_address(sg_iter),
>   					cache_level, true);
>   		if (++pte == GEN8_PTES) {
>   			kunmap_px(ppgtt, pt_vaddr);
> @@ -797,8 +796,10 @@ static void gen8_ppgtt_insert_entries(struct i915_address_space *vm,
>   	struct i915_hw_ppgtt *ppgtt =
>   		container_of(vm, struct i915_hw_ppgtt, base);
>   	struct i915_page_directory_pointer *pdp = &ppgtt->pdp; /* FIXME: 48b */
> +	struct sg_page_iter sg_iter;
>
> -	gen8_ppgtt_insert_pte_entries(vm, pdp, pages, start, cache_level);
> +	__sg_page_iter_start(&sg_iter, pages->sgl, sg_nents(pages->sgl), 0);
> +	gen8_ppgtt_insert_pte_entries(vm, pdp, &sg_iter, start, cache_level);
>   }
>
>   static void gen8_free_page_tables(struct drm_device *dev,
>