| Message ID | 1434495990-28012-25-git-send-email-maraeo@gmail.com |
|---|---|
| State | New |
| Headers | show |
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 4d6ff38..05cb67f 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -465,10 +465,18 @@ static void si_set_clip_state(struct pipe_context *ctx, } cb.buffer = NULL; - cb.user_buffer = state->ucp; - cb.buffer_offset = 0; - cb.buffer_size = 4*4*8; + cb.user_buffer = NULL; + cb.buffer_size = sizeof(state->ucp); + + si_upload_const_buffer(sctx, (struct r600_resource**)&cb.buffer, + (void*)state->ucp, sizeof(state->ucp), + &cb.buffer_offset); + + /* TODO: can we have a buffer slot that is shared by all stages, + * so that we don't have to bind this twice? + */ ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, SI_DRIVER_STATE_CONST_BUF, &cb); + ctx->set_constant_buffer(ctx, PIPE_SHADER_TESS_EVAL, SI_DRIVER_STATE_CONST_BUF, &cb); pipe_resource_reference(&cb.buffer, NULL); si_pm4_set_state(sctx, clip, pm4);
Thanks to Chris for reminding me that user clip planes are not possible with the core profile where tessellation is enabled, so I'm dropping this patch. Marek On Wed, Jun 17, 2015 at 1:06 AM, Marek Olšák <maraeo@gmail.com> wrote: > From: Marek Olšák <marek.olsak@amd.com> > > --- > src/gallium/drivers/radeonsi/si_state.c | 14 +++++++++++--- > 1 file changed, 11 insertions(+), 3 deletions(-) > > diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c > index 4d6ff38..05cb67f 100644 > --- a/src/gallium/drivers/radeonsi/si_state.c > +++ b/src/gallium/drivers/radeonsi/si_state.c > @@ -465,10 +465,18 @@ static void si_set_clip_state(struct pipe_context *ctx, > } > > cb.buffer = NULL; > - cb.user_buffer = state->ucp; > - cb.buffer_offset = 0; > - cb.buffer_size = 4*4*8; > + cb.user_buffer = NULL; > + cb.buffer_size = sizeof(state->ucp); > + > + si_upload_const_buffer(sctx, (struct r600_resource**)&cb.buffer, > + (void*)state->ucp, sizeof(state->ucp), > + &cb.buffer_offset); > + > + /* TODO: can we have a buffer slot that is shared by all stages, > + * so that we don't have to bind this twice? > + */ > ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, SI_DRIVER_STATE_CONST_BUF, &cb); > + ctx->set_constant_buffer(ctx, PIPE_SHADER_TESS_EVAL, SI_DRIVER_STATE_CONST_BUF, &cb); > pipe_resource_reference(&cb.buffer, NULL); > > si_pm4_set_state(sctx, clip, pm4); > -- > 2.1.0 >
From: Marek Olšák <marek.olsak@amd.com> --- src/gallium/drivers/radeonsi/si_state.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)