drm/i915/skl: Disallow tiling changes during page flip

Submitted by Tvrtko Ursulin on April 21, 2015, 12:45 p.m.

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Message ID 1429620316-20800-1-git-send-email-tvrtko.ursulin@linux.intel.com
State New
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Commit Message

Tvrtko Ursulin April 21, 2015, 12:45 p.m.
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

It would require watermark reprogramming which we do not want to do.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Sonika Jindal <sonika.jindal@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
Why do we not want to reprogram wms?

This doesn't do anything about rotation. I don't see how to do it with the
current design since old/new property is in plane state not available in
page flip.

And we don't have a callback for set property since drm core eats it up.
Perhaps it would also be a more flexible design to use the helper pattern
there? To allow drivers to handle common properties on their own if they
want to. This way we could remember to reprogram wm, if we wanted to in
the first place.

P.S. The DDX handles this page flip failure nicely.
---
 drivers/gpu/drm/i915/intel_display.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0ed181e..e101a9e 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10646,6 +10646,15 @@  void intel_check_page_flip(struct drm_device *dev, int pipe)
 	spin_unlock(&dev->event_lock);
 }
 
+static bool intel_is_y_tiled(uint64_t fb_modifier)
+{
+	if (fb_modifier == I915_FORMAT_MOD_Y_TILED ||
+	    fb_modifier == I915_FORMAT_MOD_Yf_TILED)
+		return true;
+
+	return false;
+}
+
 static int intel_crtc_page_flip(struct drm_crtc *crtc,
 				struct drm_framebuffer *fb,
 				struct drm_pending_vblank_event *event,
@@ -10775,6 +10784,14 @@  static int intel_crtc_page_flip(struct drm_crtc *crtc,
 						  + intel_crtc->dspaddr_offset;
 
 	if (mmio_flip) {
+		/* Temporarily embedding knowledge of disallowed tiling mode
+		 * transition which would require watermark reprogramming.
+		 */
+		if (intel_is_y_tiled(old_fb->modifier[0]) !=
+		    intel_is_y_tiled(fb->modifier[0])) {
+			ret = -EINVAL;
+			goto cleanup_unpin;
+		}
 		ret = intel_queue_mmio_flip(dev, crtc, fb, obj, ring,
 					    page_flip_flags);
 		if (ret)

Comments

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6244
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                                  318/318              318/318
IVB                                  341/341              341/341
BYT                                  287/287              287/287
BDW                                  318/318              318/318
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
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