[v4,7/8] drm/i915/skl: Assert the requirements to enter or exit DC6.

Submitted by Animesh Manna on April 16, 2015, 8:52 a.m.


Message ID 1429174334-12089-8-git-send-email-animesh.manna@intel.com
State New
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Commit Message

Animesh Manna April 16, 2015, 8:52 a.m.
From: Suketu Shah <suketu.j.shah@intel.com>

Warn if the conditions to enter or exit DC6 are not satisfied such
as support for runtime PM, state of power well, CSR loading etc.

v2: Removed camelcase in functions and variables.

v3: Do some minimal check to assert if CSR program is not loaded.

1] Correct the check for backlight-disabling in assert_can_enable_dc6().
2] Check csr.loaded = false before disabling DC6 and simplify other checks.

1] Remove checks for DC5 state from assert_can_enable_dc6 function as DC5 is no
   longer enabled before enabling DC6.
2] Correct the check for CSR-loading in assert_can_disable_dc6 function as CSR must
   be loaded for context restore to happen on DC6 disabling.

1] It's okay to explicitly disable DC6 during driver-load/resume even though it might
   already be disabled and so don't warn about it.

v7: Rebase to latest.

v8: Sqashed the patch from Imre -
[PATCH] drm/i915/skl: avoid false CSR fw not loaded WARN during driver load/resume

v9: After adding dmc ver 1.0 support rebased on top of nightly. (Animesh)

v10: During initialization added a early return before disabling DC5. (Animesh)

Issue: VIZ-2819
Signed-off-by: A.Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Suketu Shah <suketu.j.shah@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
 drivers/gpu/drm/i915/intel_runtime_pm.c | 40 +++++++++++++++++++++++++++++----
 1 file changed, 36 insertions(+), 4 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index ba49795..6bbf9ec 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -361,6 +361,12 @@  static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)
 	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
+	/*
+	 * During initialization, the firmware may not be loaded yet.
+	 * We still want to make sure that the DC enabling flag is cleared.
+	 */
+	if (dev_priv->power_domains.initializing)
+		return;
 	WARN(!pg2_enabled, "PG2 not enabled to disable DC5.\n");
@@ -398,12 +404,39 @@  static void gen9_disable_dc5(struct drm_i915_private *dev_priv)
-static void skl_enable_dc6(struct drm_i915_private *dev_priv)
+static void assert_can_enable_dc6(struct drm_i915_private *dev_priv)
 	struct drm_device *dev = dev_priv->dev;
+	WARN(!IS_SKYLAKE(dev), "Platform doesn't support DC6.\n");
+	WARN(!HAS_RUNTIME_PM(dev), "Runtime PM not enabled.\n");
+		"Backlight is not disabled.\n");
+		"DC6 already programmed to be enabled.\n");
+	assert_csr_loaded(dev_priv);
+static void assert_can_disable_dc6(struct drm_i915_private *dev_priv)
+	/*
+	 * During initialization, the firmware may not be loaded yet.
+	 * We still want to make sure that the DC enabling flag is cleared.
+	 */
+	if (dev_priv->power_domains.initializing)
+		return;
+	assert_csr_loaded(dev_priv);
+		"DC6 already programmed to be disabled.\n");
+static void skl_enable_dc6(struct drm_i915_private *dev_priv)
 	uint32_t val;
+	assert_can_enable_dc6(dev_priv);
 	DRM_DEBUG_KMS("Enabling DC6\n");
@@ -418,10 +451,9 @@  static void skl_enable_dc6(struct drm_i915_private *dev_priv)
 static void skl_disable_dc6(struct drm_i915_private *dev_priv)
-	struct drm_device *dev = dev_priv->dev;
 	uint32_t val;
+	assert_can_disable_dc6(dev_priv);
 	DRM_DEBUG_KMS("Disabling DC6\n");