[Mesa-dev,03/14] i965: Add helper functions to calculate the slice pitch of an array or 3D miptree.

Submitted by Francisco Jerez on Feb. 6, 2015, 5:23 p.m.

Details

Message ID 1423243408-24744-3-git-send-email-currojerez@riseup.net
State New
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Commit Message

Francisco Jerez Feb. 6, 2015, 5:23 p.m.
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c    | 45 +++++++++++++++++++++------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 18 +++++++++++
 2 files changed, 53 insertions(+), 10 deletions(-)

Patch hide | download patch | download mbox

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 0e2841f..2bc718b 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -227,6 +227,39 @@  brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
    }
 }
 
+unsigned
+brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
+                                       const struct intel_mipmap_tree *mt,
+                                       unsigned level)
+{
+   if (mt->target == GL_TEXTURE_3D ||
+       (brw->gen == 4 && mt->target == GL_TEXTURE_CUBE_MAP)) {
+      return ALIGN(minify(mt->physical_width0, level), mt->align_w);
+   } else {
+      return 0;
+   }
+}
+
+unsigned
+brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
+                                     const struct intel_mipmap_tree *mt,
+                                     unsigned level)
+{
+   if (mt->target == GL_TEXTURE_3D ||
+       (brw->gen == 4 && mt->target == GL_TEXTURE_CUBE_MAP)) {
+      return ALIGN(minify(mt->physical_height0, level), mt->align_h);
+
+   } else {
+      const unsigned h0 = ALIGN(mt->physical_height0, mt->align_h);
+      const unsigned h1 = ALIGN(minify(mt->physical_height0, 1), mt->align_h);
+
+      if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
+         return h0;
+      else
+         return h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h;
+   }
+}
+
 static void
 align_cube(struct intel_mipmap_tree *mt)
 {
@@ -243,17 +276,9 @@  static void
 brw_miptree_layout_texture_array(struct brw_context *brw,
 				 struct intel_mipmap_tree *mt)
 {
-   int h0, h1;
-   unsigned height = mt->physical_height0;
-
-   h0 = ALIGN(mt->physical_height0, mt->align_h);
-   h1 = ALIGN(minify(mt->physical_height0, 1), mt->align_h);
-   if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
-      mt->qpitch = h0;
-   else
-      mt->qpitch = (h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h);
-
+   mt->qpitch = brw_miptree_get_vertical_slice_pitch(brw, mt, 0);
    int physical_qpitch = mt->compressed ? mt->qpitch / 4 : mt->qpitch;
+   unsigned height = mt->physical_height0;
 
    brw_miptree_layout_2d(mt);
 
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index ee9cf1e..e17132d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -715,6 +715,24 @@  intel_miptree_updownsample(struct brw_context *brw,
                            struct intel_mipmap_tree *src,
                            struct intel_mipmap_tree *dst);
 
+/**
+ * Horizontal distance from one slice to the next in the two-dimensional
+ * miptree layout.
+ */
+unsigned
+brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
+                                       const struct intel_mipmap_tree *mt,
+                                       unsigned level);
+
+/**
+ * Vertical distance from one slice to the next in the two-dimensional miptree
+ * layout.
+ */
+unsigned
+brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
+                                     const struct intel_mipmap_tree *mt,
+                                     unsigned level);
+
 void brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt);
 
 void *intel_miptree_map_raw(struct brw_context *brw,

Comments

I'm going to push patches 3 to 5 from this old series in 48h, they're
too much effort to keep up to date.

Francisco Jerez <currojerez@riseup.net> writes:

> ---
>  src/mesa/drivers/dri/i965/brw_tex_layout.c    | 45 +++++++++++++++++++++------
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 18 +++++++++++
>  2 files changed, 53 insertions(+), 10 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> index 0e2841f..2bc718b 100644
> --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
> +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
> @@ -227,6 +227,39 @@ brw_miptree_layout_2d(struct intel_mipmap_tree *mt)
>     }
>  }
>  
> +unsigned
> +brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
> +                                       const struct intel_mipmap_tree *mt,
> +                                       unsigned level)
> +{
> +   if (mt->target == GL_TEXTURE_3D ||
> +       (brw->gen == 4 && mt->target == GL_TEXTURE_CUBE_MAP)) {
> +      return ALIGN(minify(mt->physical_width0, level), mt->align_w);
> +   } else {
> +      return 0;
> +   }
> +}
> +
> +unsigned
> +brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
> +                                     const struct intel_mipmap_tree *mt,
> +                                     unsigned level)
> +{
> +   if (mt->target == GL_TEXTURE_3D ||
> +       (brw->gen == 4 && mt->target == GL_TEXTURE_CUBE_MAP)) {
> +      return ALIGN(minify(mt->physical_height0, level), mt->align_h);
> +
> +   } else {
> +      const unsigned h0 = ALIGN(mt->physical_height0, mt->align_h);
> +      const unsigned h1 = ALIGN(minify(mt->physical_height0, 1), mt->align_h);
> +
> +      if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
> +         return h0;
> +      else
> +         return h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h;
> +   }
> +}
> +
>  static void
>  align_cube(struct intel_mipmap_tree *mt)
>  {
> @@ -243,17 +276,9 @@ static void
>  brw_miptree_layout_texture_array(struct brw_context *brw,
>  				 struct intel_mipmap_tree *mt)
>  {
> -   int h0, h1;
> -   unsigned height = mt->physical_height0;
> -
> -   h0 = ALIGN(mt->physical_height0, mt->align_h);
> -   h1 = ALIGN(minify(mt->physical_height0, 1), mt->align_h);
> -   if (mt->array_layout == ALL_SLICES_AT_EACH_LOD)
> -      mt->qpitch = h0;
> -   else
> -      mt->qpitch = (h0 + h1 + (brw->gen >= 7 ? 12 : 11) * mt->align_h);
> -
> +   mt->qpitch = brw_miptree_get_vertical_slice_pitch(brw, mt, 0);
>     int physical_qpitch = mt->compressed ? mt->qpitch / 4 : mt->qpitch;
> +   unsigned height = mt->physical_height0;
>  
>     brw_miptree_layout_2d(mt);
>  
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index ee9cf1e..e17132d 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -715,6 +715,24 @@ intel_miptree_updownsample(struct brw_context *brw,
>                             struct intel_mipmap_tree *src,
>                             struct intel_mipmap_tree *dst);
>  
> +/**
> + * Horizontal distance from one slice to the next in the two-dimensional
> + * miptree layout.
> + */
> +unsigned
> +brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
> +                                       const struct intel_mipmap_tree *mt,
> +                                       unsigned level);
> +
> +/**
> + * Vertical distance from one slice to the next in the two-dimensional miptree
> + * layout.
> + */
> +unsigned
> +brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
> +                                     const struct intel_mipmap_tree *mt,
> +                                     unsigned level);
> +
>  void brw_miptree_layout(struct brw_context *brw, struct intel_mipmap_tree *mt);
>  
>  void *intel_miptree_map_raw(struct brw_context *brw,
> -- 
> 2.1.3
>
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