drm/amd/powerplay: fix deadlock on setting power_dpm_force_performance_level

Submitted by Xu, Feifei on Nov. 6, 2019, 7:51 a.m.

Details

Message ID MN2PR12MB3775604BF829ED0FC0A22362FE790@MN2PR12MB3775.namprd12.prod.outlook.com
State New
Headers show
Series "drm/amd/powerplay: fix deadlock on setting power_dpm_force_performance_level" ( rev: 2 ) in AMD X.Org drivers

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Commit Message

Xu, Feifei Nov. 6, 2019, 7:51 a.m.
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Quan, Evan

Sent: Wednesday, November 6, 2019 2:57 PM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan <Evan.Quan@amd.com>
Subject: [PATCH] drm/amd/powerplay: fix deadlock on setting power_dpm_force_performance_level

smu_enable_umd_pstate() will try to get the smu->mutex which was already hold by its parent API smu_force_performance_level() on the call path.
Thus deadlock happens.

Change-Id: Ic4d3c7d06eb47eab2ea42b98f399cd95ab320f0c
Signed-off-by: Evan Quan <evan.quan@amd.com>

---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 19 ++++++++++++++-----
 1 file changed, 14 insertions(+), 5 deletions(-)

 		break;
 	}
 
-	mutex_unlock(&smu->mutex);
-
 	return ret;
 }
 
--
2.23.0

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diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index facc19cae7e5..c21fe7ac5df8 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -383,14 +383,25 @@  bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type)
 	return true;
 }
 
-
+/**
+ * smu_dpm_set_power_gate - power gate/ungate the specific IP block
+ *
+ * @smu:        smu_context pointer
+ * @block_type: the IP block to power gate/ungate
+ * @gate:       to power gate if true, ungate otherwise
+ *
+ * This API uses no smu->mutex lock protection due to:
+ * 1. It is either called by other IP block(gfx/sdma/vcn/uvd/vce).
+ *    This is guarded to be race condition free by the caller.
+ * 2. Or get called on user setting request of power_dpm_force_performance_level.
+ *    Under this case, the smu->mutex lock protection is already enforced on
+ *    the parent API smu_force_performance_level of the call path.
+ */
 int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
 			   bool gate)
 {
 	int ret = 0;
 
-	mutex_lock(&smu->mutex);
-
 	switch (block_type) {
 	case AMD_IP_BLOCK_TYPE_UVD:
 		ret = smu_dpm_set_uvd_enable(smu, gate); @@ -408,8 +419,6 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,