[2/2] hack and things I forgot for llc

Submitted by Andi Shyti on Sept. 20, 2019, 3:31 p.m.

Details

Message ID 20190920153100.13058-2-andi.shyti@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX - Try Bot

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Commit Message

Andi Shyti Sept. 20, 2019, 3:31 p.m.
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |  2 --
 drivers/gpu/drm/i915/gt/intel_llc.c   |  2 +-
 drivers/gpu/drm/i915/i915_drv.h       |  7 +++++++
 drivers/gpu/drm/i915/intel_pm.c       | 14 ++++++++++++++
 drivers/gpu/drm/i915/intel_pm.h       |  3 ++-
 5 files changed, 24 insertions(+), 4 deletions(-)

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diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index f9394a76a661..80c92ec66c2c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -40,8 +40,6 @@  static int __gt_unpark(struct intel_wakeref *wf)
 	gt->awake = intel_display_power_get(i915, POWER_DOMAIN_GT_IRQ);
 	GEM_BUG_ON(!gt->awake);
 
-	intel_enable_gt_powersave(i915);
-
 	i915_update_gfx_val(i915);
 	if (INTEL_GEN(i915) >= 6)
 		gen6_rps_busy(i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c b/drivers/gpu/drm/i915/gt/intel_llc.c
index 1795ebef3d4e..bf2bf42ac8c2 100644
--- a/drivers/gpu/drm/i915/gt/intel_llc.c
+++ b/drivers/gpu/drm/i915/gt/intel_llc.c
@@ -39,7 +39,7 @@  static unsigned int cpu_max_MHz(void)
 static void gen6_update_ring_freq(struct intel_llc *llc)
 {
 	struct drm_i915_private *i915 = llc_to_gt(llc)->i915;
-	struct intel_rps *rps = &llc_to_gt(llc)->rps;
+	struct intel_rps *rps = &i915->gt_pm.rps;
 	unsigned int max_ia_freq, min_ring_freq;
 	unsigned int max_gpu_freq, min_gpu_freq;
 	const int min_freq = 15;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 000c95ca786b..dc8082adc1e7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -598,6 +598,10 @@  struct intel_rps {
 	struct intel_rps_ei ei;
 };
 
+struct intel_gen6_power_mgmt {
+	struct intel_rps rps;
+};
+
 /* defined intel_pm.c */
 extern spinlock_t mchdev_lock;
 
@@ -1493,6 +1497,9 @@  struct drm_i915_private {
 	 */
 	u32 edram_size_mb;
 
+	/* gen6+ GT PM state */
+	struct intel_gen6_power_mgmt gt_pm;
+
 	/* ilk-only ips/rps state. Everything in here is protected by the global
 	 * mchdev_lock in intel_pm.c */
 	struct intel_ilk_power_mgmt ips;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a92a73e6463c..b6b1411581ff 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7979,6 +7979,20 @@  static void intel_enable_rps(struct drm_i915_private *dev_priv)
 	rps->enabled = true;
 }
 
+void intel_enable_gt_powersave(struct drm_i915_private *dev_priv)
+{
+	/* Powersaving is controlled by the host when inside a VM */
+	if (intel_vgpu_active(dev_priv))
+		return;
+
+	mutex_lock(&dev_priv->gt_pm.rps.lock);
+
+	if (HAS_RPS(dev_priv))
+		intel_enable_rps(dev_priv);
+
+	mutex_unlock(&dev_priv->gt_pm.rps.lock);
+}
+
 static void ibx_init_clock_gating(struct drm_i915_private *dev_priv)
 {
 	/*
diff --git a/drivers/gpu/drm/i915/intel_pm.h b/drivers/gpu/drm/i915/intel_pm.h
index 5408d19e0f50..1a5d2e4210d6 100644
--- a/drivers/gpu/drm/i915/intel_pm.h
+++ b/drivers/gpu/drm/i915/intel_pm.h
@@ -32,7 +32,9 @@  void intel_pm_setup(struct drm_i915_private *dev_priv);
 void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 void intel_gpu_ips_teardown(void);
 void intel_init_gt_powersave(struct drm_i915_private *dev_priv);
+void intel_disable_gt_powersave(struct drm_i915_private *dev_priv);
 void intel_sanitize_gt_powersave(struct drm_i915_private *dev_priv);
+void intel_enable_gt_powersave(struct drm_i915_private *dev_priv);
 void gen6_rps_busy(struct drm_i915_private *dev_priv);
 void gen6_rps_idle(struct drm_i915_private *dev_priv);
 void gen6_rps_boost(struct i915_request *rq);
@@ -47,7 +49,6 @@  void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
 			  struct skl_ddb_allocation *ddb /* out */);
 void skl_pipe_wm_get_hw_state(struct intel_crtc *crtc,
 			      struct skl_pipe_wm *out);
-void intel_disable_gt_powersave(struct drm_i915_private *dev_priv);
 void g4x_wm_sanitize(struct drm_i915_private *dev_priv);
 void vlv_wm_sanitize(struct drm_i915_private *dev_priv);
 bool intel_can_enable_sagv(struct intel_atomic_state *state);