drm/amdgpu: Navi10/12 VF doesn't support SMU

Submitted by jianzh@amd.com on Sept. 12, 2019, 3:45 a.m.

Details

Message ID 20190912034527.15762-1-jianzh@amd.com
State Accepted
Commit a4ac7693f8950b6a9be59dcde42fbe103d714dc7
Headers show
Series "drm/amdgpu: Navi10/12 VF doesn't support SMU" ( rev: 1 ) in AMD X.Org drivers

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Commit Message

jianzh@amd.com Sept. 12, 2019, 3:45 a.m.
From: Jiange Zhao <Jiange.Zhao@amd.com>

In SRIOV case, SMU and powerplay are handled in HV.

VF shouldn't have control over SMU and powerplay.

Signed-off-by: Jiange Zhao <Jiange.Zhao@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 4c24672be12a..fb097aa089da 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -438,7 +438,7 @@  int nv_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
 		amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
-		    is_support_sw_smu(adev))
+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
 		if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -449,7 +449,7 @@  int nv_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
 		amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
-		    is_support_sw_smu(adev))
+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
 		amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
 		if (adev->enable_mes)
@@ -461,7 +461,7 @@  int nv_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
 		amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
-		    is_support_sw_smu(adev))
+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
 		if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
@@ -472,7 +472,7 @@  int nv_set_ip_blocks(struct amdgpu_device *adev)
 		amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
 		amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT &&
-		    is_support_sw_smu(adev))
+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
 			amdgpu_device_ip_block_add(adev, &smu_v11_0_ip_block);
 		amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
 		break;

Comments

Reviewed-by: Emily Deng <Emily.Deng@amd.com>

Best wishes
Emily Deng



>-----Original Message-----
>From: Zhao, Jiange <Jiange.Zhao@amd.com>
>Sent: Thursday, September 12, 2019 11:46 AM
>To: amd-gfx@lists.freedesktop.org
>Cc: Nieto, David M <David.Nieto@amd.com>; Deng, Emily
><Emily.Deng@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>;
>Zhao, Jiange <Jiange.Zhao@amd.com>
>Subject: [PATCH] drm/amdgpu: Navi10/12 VF doesn't support SMU
>
>From: Jiange Zhao <Jiange.Zhao@amd.com>
>
>In SRIOV case, SMU and powerplay are handled in HV.
>
>VF shouldn't have control over SMU and powerplay.
>
>Signed-off-by: Jiange Zhao <Jiange.Zhao@amd.com>
>---
> drivers/gpu/drm/amd/amdgpu/nv.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
>b/drivers/gpu/drm/amd/amdgpu/nv.c index 4c24672be12a..fb097aa089da
>100644
>--- a/drivers/gpu/drm/amd/amdgpu/nv.c
>+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
>@@ -438,7 +438,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
> 		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
> 		amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
> 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
>-		    is_support_sw_smu(adev))
>+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&smu_v11_0_ip_block);
> 		if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&dce_virtual_ip_block); @@ -449,7 +449,7 @@ int nv_set_ip_blocks(struct
>amdgpu_device *adev)
> 		amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
> 		amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
> 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT
>&&
>-		    is_support_sw_smu(adev))
>+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&smu_v11_0_ip_block);
> 		amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
> 		if (adev->enable_mes)
>@@ -461,7 +461,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev)
> 		amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);
> 		amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);
> 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP &&
>-		    is_support_sw_smu(adev))
>+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&smu_v11_0_ip_block);
> 		if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&dce_virtual_ip_block); @@ -472,7 +472,7 @@ int nv_set_ip_blocks(struct
>amdgpu_device *adev)
> 		amdgpu_device_ip_block_add(adev, &gfx_v10_0_ip_block);
> 		amdgpu_device_ip_block_add(adev, &sdma_v5_0_ip_block);
> 		if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT
>&&
>-		    is_support_sw_smu(adev))
>+		    is_support_sw_smu(adev) && !amdgpu_sriov_vf(adev))
> 			amdgpu_device_ip_block_add(adev,
>&smu_v11_0_ip_block);
> 		amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block);
> 		break;
>--
>2.20.1