drm/amd/amdgpu: power up sdma_v4 for resume back period

Submitted by Quan, Evan on Sept. 12, 2019, 2:20 a.m.

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Message ID MN2PR12MB334464D43A27239078B7F728E4B00@MN2PR12MB3344.namprd12.prod.outlook.com
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Series "drm/amd/amdgpu: power up sdma_v4 for resume back period" ( rev: 2 ) in AMD X.Org drivers

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Commit Message

Quan, Evan Sept. 12, 2019, 2:20 a.m.
It's better to say "sdma engine" or just "sdma" instead of "sdma_v4".
Anyway, the patch is reviewed-by: Evan Quan <evan.quan@amd.com>

-----Original Message-----
From: Liang, Prike <Prike.Liang@amd.com> 
Sent: Thursday, September 12, 2019 9:59 AM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan <Evan.Quan@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Liu, Aaron <Aaron.Liu@amd.com>; Liang, Prike <Prike.Liang@amd.com>
Subject: [PATCH] drm/amd/amdgpu: power up sdma_v4 for resume back period

The sdma_v4 should be ungated when the IP resume back,
otherwise it will hang up and resume time out error.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c    |  2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c     | 10 ++++++----
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c |  3 +++
 3 files changed, 10 insertions(+), 5 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 357e45f..2632652 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -951,6 +951,7 @@  int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
 	case AMD_IP_BLOCK_TYPE_UVD:
 	case AMD_IP_BLOCK_TYPE_VCN:
 	case AMD_IP_BLOCK_TYPE_VCE:
+	case AMD_IP_BLOCK_TYPE_SDMA:
 		if (swsmu)
 			ret = smu_dpm_set_power_gate(&adev->smu, block_type, gate);
 		else
@@ -959,7 +960,6 @@  int amdgpu_dpm_set_powergating_by_smu(struct amdgpu_device *adev, uint32_t block
 		break;
 	case AMD_IP_BLOCK_TYPE_GMC:
 	case AMD_IP_BLOCK_TYPE_ACP:
-	case AMD_IP_BLOCK_TYPE_SDMA:
 		ret = ((adev)->powerplay.pp_funcs->set_powergating_by_smu(
 				(adev)->powerplay.pp_handle, block_type, gate));
 		break;
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index d019b85..b536f04 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1801,8 +1801,9 @@  static int sdma_v4_0_hw_init(void *handle)
 	int r;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs &&
-			adev->powerplay.pp_funcs->set_powergating_by_smu)
+	if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs &&
+			adev->powerplay.pp_funcs->set_powergating_by_smu) ||
+			adev->asic_type == CHIP_RENOIR)
 		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, false);
 
 	if (!amdgpu_sriov_vf(adev))
@@ -1829,8 +1830,9 @@  static int sdma_v4_0_hw_fini(void *handle)
 	sdma_v4_0_ctx_switch_enable(adev, false);
 	sdma_v4_0_enable(adev, false);
 
-	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
-			&& adev->powerplay.pp_funcs->set_powergating_by_smu)
+	if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
+			&& adev->powerplay.pp_funcs->set_powergating_by_smu) ||
+			adev->asic_type == CHIP_RENOIR)
 		amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, true);
 
 	return 0;
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e18bfce..a5fca51 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -400,6 +400,9 @@  int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,
 	case AMD_IP_BLOCK_TYPE_GFX:
 		ret = smu_gfx_off_control(smu, gate);
 		break;
+	case AMD_IP_BLOCK_TYPE_SDMA:
+		ret = smu_powergate_sdma(smu, gate);
+		break;
 	default:
 		break;
 	}

Comments

Thanks review and originally want emphasize the sequence only needed at sdma v4 case.
 
Thanks,
Prike
> -----Original Message-----
> From: Quan, Evan <Evan.Quan@amd.com>
> Sent: Thursday, September 12, 2019 10:20 AM
> To: Liang, Prike <Prike.Liang@amd.com>; amd-gfx@lists.freedesktop.org
> Cc: Feng, Kenneth <Kenneth.Feng@amd.com>; Huang, Ray
> <Ray.Huang@amd.com>; Liu, Aaron <Aaron.Liu@amd.com>
> Subject: RE: [PATCH] drm/amd/amdgpu: power up sdma_v4 for resume back
> period
> 
> It's better to say "sdma engine" or just "sdma" instead of "sdma_v4".
> Anyway, the patch is reviewed-by: Evan Quan <evan.quan@amd.com>
> 
> -----Original Message-----
> From: Liang, Prike <Prike.Liang@amd.com>
> Sent: Thursday, September 12, 2019 9:59 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan <Evan.Quan@amd.com>; Feng, Kenneth
> <Kenneth.Feng@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Liu, Aaron
> <Aaron.Liu@amd.com>; Liang, Prike <Prike.Liang@amd.com>
> Subject: [PATCH] drm/amd/amdgpu: power up sdma_v4 for resume back
> period
> 
> The sdma_v4 should be ungated when the IP resume back, otherwise it will
> hang up and resume time out error.
> 
> Signed-off-by: Prike Liang <Prike.Liang@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c    |  2 +-
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c     | 10 ++++++----
>  drivers/gpu/drm/amd/powerplay/amdgpu_smu.c |  3 +++
>  3 files changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> index 357e45f..2632652 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
> @@ -951,6 +951,7 @@ int amdgpu_dpm_set_powergating_by_smu(struct
> amdgpu_device *adev, uint32_t block
>  	case AMD_IP_BLOCK_TYPE_UVD:
>  	case AMD_IP_BLOCK_TYPE_VCN:
>  	case AMD_IP_BLOCK_TYPE_VCE:
> +	case AMD_IP_BLOCK_TYPE_SDMA:
>  		if (swsmu)
>  			ret = smu_dpm_set_power_gate(&adev->smu,
> block_type, gate);
>  		else
> @@ -959,7 +960,6 @@ int amdgpu_dpm_set_powergating_by_smu(struct
> amdgpu_device *adev, uint32_t block
>  		break;
>  	case AMD_IP_BLOCK_TYPE_GMC:
>  	case AMD_IP_BLOCK_TYPE_ACP:
> -	case AMD_IP_BLOCK_TYPE_SDMA:
>  		ret = ((adev)->powerplay.pp_funcs-
> >set_powergating_by_smu(
>  				(adev)->powerplay.pp_handle, block_type,
> gate));
>  		break;
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index d019b85..b536f04 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1801,8 +1801,9 @@ static int sdma_v4_0_hw_init(void *handle)
>  	int r;
>  	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> &&
> -			adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> +	if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> &&
> +			adev->powerplay.pp_funcs-
> >set_powergating_by_smu) ||
> +			adev->asic_type == CHIP_RENOIR)
>  		amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_SDMA, false);
> 
>  	if (!amdgpu_sriov_vf(adev))
> @@ -1829,8 +1830,9 @@ static int sdma_v4_0_hw_fini(void *handle)
>  	sdma_v4_0_ctx_switch_enable(adev, false);
>  	sdma_v4_0_enable(adev, false);
> 
> -	if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> -			&& adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> +	if ((adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> +			&& adev->powerplay.pp_funcs-
> >set_powergating_by_smu) ||
> +			adev->asic_type == CHIP_RENOIR)
>  		amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_SDMA, true);
> 
>  	return 0;
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index e18bfce..a5fca51 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -400,6 +400,9 @@ int smu_dpm_set_power_gate(struct smu_context
> *smu, uint32_t block_type,
>  	case AMD_IP_BLOCK_TYPE_GFX:
>  		ret = smu_gfx_off_control(smu, gate);
>  		break;
> +	case AMD_IP_BLOCK_TYPE_SDMA:
> +		ret = smu_powergate_sdma(smu, gate);
> +		break;
>  	default:
>  		break;
>  	}
> --
> 2.7.4