[2/4] drm/amdgpu: support pcie bif ras query and inject

Submitted by Chen, Guchun on Sept. 11, 2019, 3:21 a.m.

Details

Message ID 20190911032016.10313-3-guchun.chen@amd.com
State New
Headers show
Series "drm/amdgpu: add pcie bif ras query functionality" ( rev: 2 1 ) in AMD X.Org drivers

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Commit Message

Chen, Guchun Sept. 11, 2019, 3:21 a.m.
Call pcie bif ras query/inject in amdgpu ras.

Change-Id: Idf5021edf21e704314338aa2e8b0671e4d622d1d
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +++++
 1 file changed, 5 insertions(+)

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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 84ca13b9d42e..5f06f1e645c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -654,6 +654,10 @@  int amdgpu_ras_error_query(struct amdgpu_device *adev,
 		if (adev->mmhub_funcs->query_ras_error_count)
 			adev->mmhub_funcs->query_ras_error_count(adev, &err_data);
 		break;
+	case AMDGPU_RAS_BLOCK__PCIE_BIF:
+		if (adev->nbio.funcs->query_ras_error_count)
+			adev->nbio.funcs->query_ras_error_count(adev, &err_data);
+		break;
 	default:
 		break;
 	}
@@ -703,6 +707,7 @@  int amdgpu_ras_error_inject(struct amdgpu_device *adev,
 	case AMDGPU_RAS_BLOCK__UMC:
 	case AMDGPU_RAS_BLOCK__MMHUB:
 	case AMDGPU_RAS_BLOCK__XGMI_WAFL:
+	case AMDGPU_RAS_BLOCK__PCIE_BIF:
 		ret = psp_ras_trigger_error(&adev->psp, &block_info);
 		break;
 	default: