[23/37] drm/amdgpu: enable HDP clock gating for rn

Submitted by Alex Deucher on Aug. 21, 2019, 10:23 p.m.

Details

Message ID 20190821222359.13578-24-alexander.deucher@amd.com
State New
Headers show
Series "Enable power features for Renoir" ( rev: 1 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Alex Deucher Aug. 21, 2019, 10:23 p.m.
From: Prike Liang <Prike.Liang@amd.com>

Enable HDP light sleep clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 25f55c793feb..ce101bcbe02c 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1165,7 +1165,8 @@  static int soc15_common_early_init(void *handle)
 				 AMD_CG_SUPPORT_MC_LS |
 				 AMD_CG_SUPPORT_SDMA_MGCG |
 				 AMD_CG_SUPPORT_SDMA_LS |
-				 AMD_CG_SUPPORT_BIF_LS;
+				 AMD_CG_SUPPORT_BIF_LS |
+				 AMD_CG_SUPPORT_HDP_LS;
 		adev->pg_flags = 0;
 		adev->external_rev_id = adev->rev_id + 0x91;