[19/37] drm/amdgpu: enable gfx clock gating for rn

Submitted by Alex Deucher on Aug. 21, 2019, 10:23 p.m.

Details

Message ID 20190821222359.13578-20-alexander.deucher@amd.com
State New
Headers show
Series "Enable power features for Renoir" ( rev: 1 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Alex Deucher Aug. 21, 2019, 10:23 p.m.
From: Prike Liang <Prike.Liang@amd.com>

Enable gfx cg/mg/cp etc clock gating.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

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diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index c092be45f5e2..d4cb7a66024e 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1154,7 +1154,13 @@  static int soc15_common_early_init(void *handle)
 		break;
 	case CHIP_RENOIR:
 		adev->asic_funcs = &soc15_asic_funcs;
-		adev->cg_flags = 0;
+		adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |
+				 AMD_CG_SUPPORT_GFX_MGLS |
+				 AMD_CG_SUPPORT_GFX_3D_CGCG |
+				 AMD_CG_SUPPORT_GFX_3D_CGLS |
+				 AMD_CG_SUPPORT_GFX_CGCG |
+				 AMD_CG_SUPPORT_GFX_CGLS |
+				 AMD_CG_SUPPORT_GFX_CP_LS;
 		adev->pg_flags = 0;
 		adev->external_rev_id = adev->rev_id + 0x91;