[v2,28/40] drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID

Submitted by Lucas De Marchi on Aug. 17, 2019, 9:38 a.m.

Details

Message ID 20190817093902.2171-29-lucas.demarchi@intel.com
State New
Headers show
Series "Tiger Lake batch 3" ( rev: 4 3 2 ) in Intel GFX

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Commit Message

Lucas De Marchi Aug. 17, 2019, 9:38 a.m.
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Like Gen11, Gen12 has 11 available bits for the ctx id field. However,
the last value (0x7FF) is reserved to indicate engine idle, so we
need to reduce the maximum number of contexts by 1 compared to Gen11.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 4 +++-
 drivers/gpu/drm/i915/i915_drv.h             | 2 ++
 2 files changed, 5 insertions(+), 1 deletion(-)

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diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index cd1fd2e5423a..1cdfe05514c3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -173,7 +173,9 @@  static inline int new_hw_id(struct drm_i915_private *i915, gfp_t gfp)
 
 	lockdep_assert_held(&i915->contexts.mutex);
 
-	if (INTEL_GEN(i915) >= 11)
+	if (INTEL_GEN(i915) >= 12)
+		max = GEN12_MAX_CONTEXT_HW_ID;
+	else if (INTEL_GEN(i915) >= 11)
 		max = GEN11_MAX_CONTEXT_HW_ID;
 	else if (USES_GUC_SUBMISSION(i915))
 		/*
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d6c8efcba612..c9b1b94a620f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1605,6 +1605,8 @@  struct drm_i915_private {
 #define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */
 #define MAX_GUC_CONTEXT_HW_ID (1 << 20) /* exclusive */
 #define GEN11_MAX_CONTEXT_HW_ID (1<<11) /* exclusive */
+/* in Gen12 ID 0x7FF is reserved to indicate idle */
+#define GEN12_MAX_CONTEXT_HW_ID	(GEN11_MAX_CONTEXT_HW_ID - 1)
 		struct list_head hw_id_list;
 	} contexts;
 

Comments

On Sat, 2019-08-17 at 02:38 -0700, Lucas De Marchi wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

> 

> Like Gen11, Gen12 has 11 available bits for the ctx id field.

> However,

> the last value (0x7FF) is reserved to indicate engine idle, so we

> need to reduce the maximum number of contexts by 1 compared to Gen11.

> 

> Cc: Chris Wilson <chris@chris-wilson.co.uk>

> Signed-off-by: Daniele Ceraolo Spurio <

> daniele.ceraolospurio@intel.com>

> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

> ---

>  drivers/gpu/drm/i915/gem/i915_gem_context.c | 4 +++-

>  drivers/gpu/drm/i915/i915_drv.h             | 2 ++

>  2 files changed, 5 insertions(+), 1 deletion(-)

> 

> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c

> b/drivers/gpu/drm/i915/gem/i915_gem_context.c

> index cd1fd2e5423a..1cdfe05514c3 100644

> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c

> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c

> @@ -173,7 +173,9 @@ static inline int new_hw_id(struct

> drm_i915_private *i915, gfp_t gfp)

>  

>  	lockdep_assert_held(&i915->contexts.mutex);

>  

> -	if (INTEL_GEN(i915) >= 11)

> +	if (INTEL_GEN(i915) >= 12)

> +		max = GEN12_MAX_CONTEXT_HW_ID;

> +	else if (INTEL_GEN(i915) >= 11)

>  		max = GEN11_MAX_CONTEXT_HW_ID;

>  	else if (USES_GUC_SUBMISSION(i915))

>  		/*

> diff --git a/drivers/gpu/drm/i915/i915_drv.h

> b/drivers/gpu/drm/i915/i915_drv.h

> index d6c8efcba612..c9b1b94a620f 100644

> --- a/drivers/gpu/drm/i915/i915_drv.h

> +++ b/drivers/gpu/drm/i915/i915_drv.h

> @@ -1605,6 +1605,8 @@ struct drm_i915_private {

>  #define MAX_CONTEXT_HW_ID (1<<21) /* exclusive */

>  #define MAX_GUC_CONTEXT_HW_ID (1 << 20) /* exclusive */

>  #define GEN11_MAX_CONTEXT_HW_ID (1<<11) /* exclusive */

> +/* in Gen12 ID 0x7FF is reserved to indicate idle */

> +#define GEN12_MAX_CONTEXT_HW_ID	(GEN11_MAX_CONTEXT_HW_ID - 1)

>  		struct list_head hw_id_list;

>  	} contexts;

>  


Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>