[v2,09/40] drm/i915/bdw+: Enable PSR in any eDP port

Submitted by Lucas De Marchi on Aug. 17, 2019, 9:38 a.m.

Details

Message ID 20190817093902.2171-10-lucas.demarchi@intel.com
State New
Headers show
Series "Tiger Lake batch 3" ( rev: 4 3 2 ) in Intel GFX

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Commit Message

Lucas De Marchi Aug. 17, 2019, 9:38 a.m.
From: José Roberto de Souza <jose.souza@intel.com>

From BDW+ the PSR registers moved from DDIA to transcoder, so any port
with a eDP panel connected can have PSR, so lets remove this
limitation.

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

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diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 29169e2435e8..5d7baac1d7c9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -589,11 +589,9 @@  void intel_psr_compute_config(struct intel_dp *intel_dp,
 
 	/*
 	 * HSW spec explicitly says PSR is tied to port A.
-	 * BDW+ platforms have a instance of PSR registers per transcoder but
-	 * for now it only supports one instance of PSR, so lets keep it
-	 * hardcoded to PORT_A
+	 * BDW+ platforms have a instance of PSR registers per transcoder.
 	 */
-	if (dig_port->base.port != PORT_A) {
+	if (IS_HASWELL(dev_priv) && dig_port->base.port != PORT_A) {
 		DRM_DEBUG_KMS("PSR condition failed: Port not supported\n");
 		return;
 	}