[4/4] drm/i915: hacks for rps

Submitted by Andi Shyti on Aug. 16, 2019, 2:39 p.m.

Details

Message ID 20190816143913.12179-4-andi.shyti@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX - Try Bot

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Commit Message

Andi Shyti Aug. 16, 2019, 2:39 p.m.
make it working... somehow!

DON'T FORGET:
To be squashed with the previous

Signed-off-by: Andi Shyti <andi.shyti@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c    |  9 ++++-----
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |  2 ++
 drivers/gpu/drm/i915/i915_irq.c       | 27 ---------------------------
 drivers/gpu/drm/i915/intel_pm.c       |  4 ----
 4 files changed, 6 insertions(+), 36 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index a36ba2ff1262..ac12d85b982b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -8,7 +8,6 @@ 
 #include "intel_gt_pm.h"
 #include "intel_rps.h"
 #include "intel_uncore.h"
-#include "intel_pm.h"
 
 void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915)
 {
@@ -229,9 +228,7 @@  void intel_gt_chipset_flush(struct intel_gt *gt)
 
 void intel_gt_driver_register(struct intel_gt *gt)
 {
-	if (IS_GEN(gt->i915, 5))
-		intel_gpu_ips_init(gt->i915);
-
+	intel_rps_driver_register(&gt->rps);
 }
 
 static int intel_gt_init_scratch(struct intel_gt *gt, unsigned int size)
@@ -281,6 +278,8 @@  int intel_gt_init(struct intel_gt *gt)
 	if (err)
 		return err;
 
+	intel_rps_init(&gt->rps);
+
 	return 0;
 }
 
@@ -292,7 +291,7 @@  void intel_gt_driver_remove(struct intel_gt *gt)
 
 void intel_gt_driver_unregister(struct intel_gt *gt)
 {
-	intel_gpu_ips_teardown();
+	intel_rps_driver_unregister(&gt->rps);
 }
 
 void intel_gt_driver_release(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index ac5b1637a3f8..5971fc47ee6a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -136,6 +136,7 @@  void intel_gt_pm_enable(struct intel_gt *gt)
 		return;
 
 	intel_gt_pm_get(gt);
+	intel_rps_enable(&gt->rps);
 
 	for_each_engine(engine, gt->i915, id) {
 		intel_engine_pm_get(engine);
@@ -151,6 +152,7 @@  void intel_gt_pm_disable(struct intel_gt *gt)
 	if (is_mock_device(gt))
 		return;
 
+	intel_rps_disable(&gt->rps);
 	intel_sanitize_gt_powersave(gt->i915);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 8af61acfc687..213992d2e518 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4011,33 +4011,6 @@  void intel_irq_init(struct drm_i915_private *dev_priv)
 	if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
 		dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
 
-	/* Let's track the enabled rps events */
-	if (IS_VALLEYVIEW(dev_priv))
-		/* WaGsvRC0ResidencyMethod:vlv */
-		dev_priv->pm_rps_events = GEN6_PM_RP_UP_EI_EXPIRED;
-	else
-		dev_priv->pm_rps_events = (GEN6_PM_RP_UP_THRESHOLD |
-					   GEN6_PM_RP_DOWN_THRESHOLD |
-					   GEN6_PM_RP_DOWN_TIMEOUT);
-
-	/* We share the register with other engine */
-	if (INTEL_GEN(dev_priv) > 9)
-		GEM_WARN_ON(dev_priv->pm_rps_events & 0xffff0000);
-
-	rps->pm_intrmsk_mbz = 0;
-
-	/*
-	 * SNB,IVB,HSW can while VLV,CHV may hard hang on looping batchbuffer
-	 * if GEN6_PM_UP_EI_EXPIRED is masked.
-	 *
-	 * TODO: verify if this can be reproduced on VLV,CHV.
-	 */
-	if (INTEL_GEN(dev_priv) <= 7)
-		rps->pm_intrmsk_mbz |= GEN6_PM_RP_UP_EI_EXPIRED;
-
-	if (INTEL_GEN(dev_priv) >= 8)
-		rps->pm_intrmsk_mbz |= GEN8_PMINTR_DISABLE_REDIRECT_TO_GUC;
-
 	dev->vblank_disable_immediate = true;
 
 	/* Most platforms treat the display irq block as an always-on
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9ba5b822f097..0c82dee659dd 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6908,11 +6908,8 @@  void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv)
 
 void intel_sanitize_gt_powersave(struct drm_i915_private *dev_priv)
 {
-	dev_priv->gt.rps.enabled = true; /* force RPS disabling */
 	dev_priv->gt_pm.rc6.enabled = true; /* force RC6 disabling */
 	intel_disable_gt_powersave(dev_priv);
-
-	intel_rps_park(&dev_priv->gt.rps);
 }
 
 static inline void intel_disable_llc_pstate(struct drm_i915_private *i915)
@@ -6951,7 +6948,6 @@  void intel_disable_gt_powersave(struct drm_i915_private *dev_priv)
 	mutex_lock(&dev_priv->gt.rps.lock);
 
 	intel_disable_rc6(dev_priv);
-	intel_rps_disable(&dev_priv->gt.rps);
 	if (HAS_LLC(dev_priv))
 		intel_disable_llc_pstate(dev_priv);