[4/4] drm/amdgpu: enable mmhub clock gating for Arcturus

Submitted by Kenneth Feng on Aug. 12, 2019, 5:41 a.m.

Details

Message ID MN2PR12MB359843FA47B82A1253E72A418ED30@MN2PR12MB3598.namprd12.prod.outlook.com
State New
Headers show
Series "Series without cover letter" ( rev: 6 ) in AMD X.Org drivers

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Commit Message

Kenneth Feng Aug. 12, 2019, 5:41 a.m.
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>



-----Original Message-----
From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf Of Le Ma

Sent: Friday, August 09, 2019 7:27 PM
To: amd-gfx@lists.freedesktop.org
Cc: Ma, Le <Le.Ma@amd.com>
Subject: [PATCH 4/4] drm/amdgpu: enable mmhub clock gating for Arcturus

[CAUTION: External Email]

Init MC_MGCG/LS flag. Also apply to athub CG.

Change-Id: Ic00cb8e6d69eb75dd32f34f778352cee93063ee0
Signed-off-by: Le Ma <le.ma@amd.com>

---
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 1 -
 drivers/gpu/drm/amd/amdgpu/soc15.c      | 4 +++-
 2 files changed, 3 insertions(+), 2 deletions(-)

--
2.7.4

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diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index e52e4d1..0cf7ef4 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -615,7 +615,6 @@  int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,
        return 0;
 }

-/* TODO: get 2 mmhub instances CG state */  void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags)  {
        int data, data1;
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index aecba1c..235cb5b 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1126,7 +1126,9 @@  static int soc15_common_early_init(void *handle)
                        AMD_CG_SUPPORT_HDP_MGCG |
                        AMD_CG_SUPPORT_HDP_LS |
                        AMD_CG_SUPPORT_SDMA_MGCG |
-                       AMD_CG_SUPPORT_SDMA_LS;
+                       AMD_CG_SUPPORT_SDMA_LS |
+                       AMD_CG_SUPPORT_MC_MGCG |
+                       AMD_CG_SUPPORT_MC_LS;
                adev->pg_flags = 0;
                adev->external_rev_id = adev->rev_id + 0x32;
                break;