drm/amdgpu: pin the csb buffer on hw init for gfx v8

Submitted by Xu, Feifei on Aug. 5, 2019, 2:19 a.m.

Details

Message ID CH2PR12MB3767F6605AC1A097D9D5586DFEDA0@CH2PR12MB3767.namprd12.prod.outlook.com
State New
Headers show
Series "drm/amdgpu: pin the csb buffer on hw init for gfx v8" ( rev: 2 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Xu, Feifei Aug. 5, 2019, 2:19 a.m.
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Gao Likun

Sent: Monday, August 5, 2019 10:07 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Gao, Likun <Likun.Gao@amd.com>; Paul Gover <pmw.gover@yahoo.co.uk>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
Subject: [PATCH] drm/amdgpu: pin the csb buffer on hw init for gfx v8

From: Likun Gao <Likun.Gao@amd.com>


Without this pin, the csb buffer will be filled with inconsistent data after S3 resume. And that will causes gfx hang on gfxoff exit since this csb will be executed then.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>

---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 40 +++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

+	r = gfx_v8_0_csb_vram_pin(adev);
+	if (r)
+		return r;
+
 	r = adev->gfx.rlc.funcs->resume(adev);
 	if (r)
 		return r;
@@ -4907,6 +4944,9 @@ static int gfx_v8_0_hw_fini(void *handle)
 	else
 		pr_err("rlc is busy, skip halt rlc\n");
 	amdgpu_gfx_rlc_exit_safe_mode(adev);
+
+	gfx_v8_0_csb_vram_unpin(adev);
+
 	return 0;
 }
 
--
2.7.4

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index d290718..98e5aa8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -1317,6 +1317,39 @@  static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
 	return 0;
 }
 
+static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) {
+	int r;
+
+	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
+	if (unlikely(r != 0))
+		return r;
+
+	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
+			AMDGPU_GEM_DOMAIN_VRAM);
+	if (!r)
+		adev->gfx.rlc.clear_state_gpu_addr =
+			amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
+
+	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
+
+	return r;
+}
+
+static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) {
+	int r;
+
+	if (!adev->gfx.rlc.clear_state_obj)
+		return;
+
+	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
+	if (likely(r == 0)) {
+		amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
+		amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
+	}
+}
+
 static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)  {
 	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -4791,6 +4824,10 @@ static int gfx_v8_0_hw_init(void *handle)
 	gfx_v8_0_init_golden_registers(adev);
 	gfx_v8_0_constants_init(adev);
 

Comments

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>

BR,
Xiaojie

> On Aug 5, 2019, at 10:20 AM, Xu, Feifei <Feifei.Xu@amd.com> wrote:
> 
> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
> 
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Gao Likun
> Sent: Monday, August 5, 2019 10:07 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Gao, Likun <Likun.Gao@amd.com>; Paul Gover <pmw.gover@yahoo.co.uk>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>
> Subject: [PATCH] drm/amdgpu: pin the csb buffer on hw init for gfx v8
> 
> From: Likun Gao <Likun.Gao@amd.com>
> 
> Without this pin, the csb buffer will be filled with inconsistent data after S3 resume. And that will causes gfx hang on gfxoff exit since this csb will be executed then.
> 
> Signed-off-by: Likun Gao <Likun.Gao@amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 40 +++++++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index d290718..98e5aa8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -1317,6 +1317,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev)
>    return 0;
> }
> 
> +static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) {
> +    int r;
> +
> +    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
> +    if (unlikely(r != 0))
> +        return r;
> +
> +    r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
> +            AMDGPU_GEM_DOMAIN_VRAM);
> +    if (!r)
> +        adev->gfx.rlc.clear_state_gpu_addr =
> +            amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
> +
> +    amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> +
> +    return r;
> +}
> +
> +static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) {
> +    int r;
> +
> +    if (!adev->gfx.rlc.clear_state_obj)
> +        return;
> +
> +    r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
> +    if (likely(r == 0)) {
> +        amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
> +        amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
> +    }
> +}
> +
> static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)  {
>    amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); @@ -4791,6 +4824,10 @@ static int gfx_v8_0_hw_init(void *handle)
>    gfx_v8_0_init_golden_registers(adev);
>    gfx_v8_0_constants_init(adev);
> 
> +    r = gfx_v8_0_csb_vram_pin(adev);
> +    if (r)
> +        return r;
> +
>    r = adev->gfx.rlc.funcs->resume(adev);
>    if (r)
>        return r;
> @@ -4907,6 +4944,9 @@ static int gfx_v8_0_hw_fini(void *handle)
>    else
>        pr_err("rlc is busy, skip halt rlc\n");
>    amdgpu_gfx_rlc_exit_safe_mode(adev);
> +
> +    gfx_v8_0_csb_vram_unpin(adev);
> +
>    return 0;
> }
> 
> --
> 2.7.4
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx