[xf86-video-cirrus,v2,1/1] Save and restore RIF Control and RAC Control registers

Submitted by Kevin Brace on Aug. 3, 2019, 2:52 a.m.

Details

Message ID 20190803025232.4009-2-kevinbrace@gmx.com
State New
Headers show
Series "Save and restore RIF Control and RAC Control registers" ( rev: 2 ) in X.org

Not browsing as part of any series.

Commit Message

Kevin Brace Aug. 3, 2019, 2:52 a.m.
While the standby resume from ACPI S3 State still fails (i.e., hard
system freeze), saving and restoring Rambus RIF (Rambus Interface)
Control and RAC (Rambus ASIC Cell) Control registers prevents weird
artifacts from being displayed after standby resume (i.e., merely a
blank screen after standby resume).

Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
---
 src/lg.h        | 1 +
 src/lg_driver.c | 9 +++++++++
 2 files changed, 10 insertions(+)

--
2.17.1

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diff --git a/src/lg.h b/src/lg.h
index 3f5dcdf..4c1ea7b 100644
--- a/src/lg.h
+++ b/src/lg.h
@@ -44,6 +44,7 @@  typedef struct {
 	/* Laguna regs */
 	CARD8 TILE, BCLK;
 	CARD16 FORMAT, DTTC, TileCtrl, CONTROL;
+	CARD16 RIFCtrl, RACCtrl;
 	CARD32 VSC;
 } LgRegRec, *LgRegPtr;

diff --git a/src/lg_driver.c b/src/lg_driver.c
index 3af8432..f6d721a 100644
--- a/src/lg_driver.c
+++ b/src/lg_driver.c
@@ -1081,6 +1081,12 @@  LgSave(ScrnInfoPtr pScrn)

     pCir->chip.lg->ModeReg.CONTROL =
     pCir->chip.lg->SavedReg.CONTROL = memrw(0x402);
+
+    pCir->chip.lg->ModeReg.RIFCtrl =
+    pCir->chip.lg->SavedReg.RIFCtrl = memrw(0x200);
+
+    pCir->chip.lg->ModeReg.RACCtrl =
+    pCir->chip.lg->SavedReg.RACCtrl = memrw(0x202);
 }

 /*
@@ -1549,6 +1555,9 @@  LgRestoreLgRegs(ScrnInfoPtr pScrn, LgRegPtr lgReg)
         memwb(0x8C, lgReg->BCLK);

     memww(0x402, lgReg->CONTROL);
+
+    memww(0x200, lgReg->RIFCtrl);
+    memww(0x202, lgReg->RACCtrl);
 }

 /*