drm/amdgpu/powerplay: use proper revision id for navi

Submitted by Xu, Feifei on July 26, 2019, 4:20 a.m.

Details

Message ID MN2PR12MB3775A0024DE6CC275E1AA4AFFEC00@MN2PR12MB3775.namprd12.prod.outlook.com
State New
Headers show
Series "drm/amdgpu/powerplay: use proper revision id for navi" ( rev: 2 ) in AMD X.Org drivers

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Commit Message

Xu, Feifei July 26, 2019, 4:20 a.m.
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>


-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher

Sent: Friday, July 26, 2019 12:11 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [PATCH] drm/amdgpu/powerplay: use proper revision id for navi

The PCI revision id determines the sku.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

---
 drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.20.1

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diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index c873228bf05f..dbac24e44174 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -1592,7 +1592,7 @@  static int navi10_set_peak_clock_by_device(struct smu_context *smu)
 	uint32_t sclk_freq = 0, uclk_freq = 0;
 	uint32_t uclk_level = 0;
 
-	switch (adev->rev_id) {
+	switch (adev->pdev->revision) {
 	case 0xf0: /* XTX */
 	case 0xc0:
 		sclk_freq = NAVI10_PEAK_SCLK_XTX;