[1/2] radv/gfx10: reduce max_esverts_base to 128

Submitted by Samuel Pitoiset on July 22, 2019, 3:53 p.m.

Details

Message ID 20190722155314.32277-1-samuel.pitoiset@gmail.com
State New
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Series "Series without cover letter" ( rev: 1 ) in Mesa

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Commit Message

Samuel Pitoiset July 22, 2019, 3:53 p.m.
Same as RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 src/amd/vulkan/radv_pipeline.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index a7ff0e2d139..fce60a62ee9 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -1704,7 +1704,7 @@  calculate_ngg_info(const VkGraphicsPipelineCreateInfo *pCreateInfo,
 
 	/* All these are per subgroup: */
 	bool max_vert_out_per_gs_instance = false;
-	unsigned max_esverts_base = 256;
+	unsigned max_esverts_base = 128;
 	unsigned max_gsprims_base = 128; /* default prim group size clamp */
 
 	/* Hardware has the following non-natural restrictions on the value