drm/amdgpu: set sdma irq src num according to sdma instances

Submitted by Le Ma on July 19, 2019, 11:19 a.m.

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Message ID BN8PR12MB305706346F5E6B707464992DF6CB0@BN8PR12MB3057.namprd12.prod.outlook.com
State New
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Series "drm/amdgpu: set sdma irq src num according to sdma instances" ( rev: 2 ) in AMD X.Org drivers

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Commit Message

Le Ma July 19, 2019, 11:19 a.m.
Reviewed-by: Le Ma <Le.Ma@amd.com>


Regards,
Ma Le

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Hawking Zhang

Sent: Friday, July 19, 2019 7:18 PM
To: amd-gfx@lists.freedesktop.org; Ma, Le <Le.Ma@amd.com>
Cc: Zhang, Hawking <Hawking.Zhang@amd.com>
Subject: [PATCH] drm/amdgpu: set sdma irq src num according to sdma instances

Otherwise, it will cause driver access non-existing sdma registers in gpu reset code path

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>

---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

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diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index c21b247..a1c2d22 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2421,10 +2421,23 @@  static const struct amdgpu_irq_src_funcs sdma_v4_0_ecc_irq_funcs = {
 
 static void sdma_v4_0_set_irq_funcs(struct amdgpu_device *adev)  {
-	adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
+	switch (adev->sdma.num_instances) {
+	case 1:
+		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
+		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE1;
+		break;
+	case 8:
+		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
+		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
+		break;
+	case 2:
+	default:
+		adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
+		adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE2;
+		break;
+	}
 	adev->sdma.trap_irq.funcs = &sdma_v4_0_trap_irq_funcs;
 	adev->sdma.illegal_inst_irq.funcs = &sdma_v4_0_illegal_inst_irq_funcs;
-	adev->sdma.ecc_irq.num_types = AMDGPU_SDMA_IRQ_LAST;
 	adev->sdma.ecc_irq.funcs = &sdma_v4_0_ecc_irq_funcs;  }
 
--
2.7.4