drm/amdgpu/: use VCN firmware offset for cache window

Submitted by Deucher, Alexander on July 18, 2019, 3:51 p.m.

Details

Message ID BN6PR12MB180932472127F74480B34989F7C80@BN6PR12MB1809.namprd12.prod.outlook.com
State New
Headers show
Series "drm/amdgpu/: use VCN firmware offset for cache window" ( rev: 3 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Deucher, Alexander July 18, 2019, 3:51 p.m.
Acked-by: Alex Deucher <alexander.deucher@amd.com>

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diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 3cb62e448a37..88e3dedcf926 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -379,11 +379,8 @@  static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
                 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
                         upper_32_bits(adev->vcn.inst->gpu_addr));
                 offset = size;
-               /* No signed header for now from firmware
                 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
                         AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
-               */
-               WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
         }

         WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);