[v1,1/3] drm/i915/gvt: Utility for valid command length check

Submitted by fred gao on July 14, 2019, 10:07 p.m.

Details

Message ID 20190714220704.13812-1-fred.gao@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GVT devel

Not browsing as part of any series.

Commit Message

fred gao July 14, 2019, 10:07 p.m.
From: "Gao, Fred" <fred.gao@intel.com>

Add utility for valid command length check.

v2: Add F_VAL_CONST flag to identify the value is const
    although LEN maybe variable. (Zhenyu)
v3: unused code removal, flag rename/conflict. (Zhenyu)
v4: redefine F_IP_ADVANCE_CUSTOM and move the check function to
    next patch. (Zhenyu)

Signed-off-by: Gao, Fred <fred.gao@intel.com>
---
 drivers/gpu/drm/i915/gvt/cmd_parser.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index b09dc315e2da..42a10b200744 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -378,17 +378,17 @@  struct cmd_info {
 	const char *name;
 	u32 opcode;
 
-#define F_LEN_MASK	(1U<<0)
+#define F_LEN_MASK	3U
 #define F_LEN_CONST  1U
 #define F_LEN_VAR    0U
+/* value is const although LEN maybe variable */
+#define F_LEN_VAR_FIXED    (1<<1)
 
 /*
  * command has its own ip advance logic
  * e.g. MI_BATCH_START, MI_BATCH_END
  */
-#define F_IP_ADVANCE_CUSTOM (1<<1)
-
-#define F_POST_HANDLE	(1<<2)
+#define F_IP_ADVANCE_CUSTOM (1<<2)
 	u32 flag;
 
 #define R_RCS	BIT(RCS0)
@@ -418,9 +418,12 @@  struct cmd_info {
 	 * flag == F_LEN_VAR : length bias bits
 	 * Note: length is in DWord
 	 */
-	u8 len;
+	u32 len;
 
 	parser_cmd_handler handler;
+
+	/* valid length in DWord */
+	u32 valid_len;
 };
 
 struct cmd_entry {
@@ -1912,7 +1915,7 @@  static const struct cmd_info cmd_info[] = {
 	{"MI_RS_CONTEXT", OP_MI_RS_CONTEXT, F_LEN_CONST, R_RCS, D_ALL, 0, 1,
 		NULL},
 
-	{"MI_DISPLAY_FLIP", OP_MI_DISPLAY_FLIP, F_LEN_VAR | F_POST_HANDLE,
+	{"MI_DISPLAY_FLIP", OP_MI_DISPLAY_FLIP, F_LEN_VAR,
 		R_RCS | R_BCS, D_ALL, 0, 8, cmd_handler_mi_display_flip},
 
 	{"MI_SEMAPHORE_MBOX", OP_MI_SEMAPHORE_MBOX, F_LEN_VAR, R_ALL, D_ALL,

Comments


Thanks .
 It is the LRI cmd in kernel  who is not matched with intel docs.
Will send the updated series later.

-----Original Message-----
From: Zhenyu Wang <zhenyuw@linux.intel.com> 

Sent: 2019年7月18日 13:42
To: Gao, Fred <fred.gao@intel.com>
Cc: intel-gvt-dev@lists.freedesktop.org
Subject: Re: [PATCH v1 1/3] drm/i915/gvt: Utility for valid command length check

On 2019.07.15 06:07:04 +0800, fred gao wrote:
> From: "Gao, Fred" <fred.gao@intel.com>

> 

> Add utility for valid command length check.

> 

> v2: Add F_VAL_CONST flag to identify the value is const

>     although LEN maybe variable. (Zhenyu)

> v3: unused code removal, flag rename/conflict. (Zhenyu)

> v4: redefine F_IP_ADVANCE_CUSTOM and move the check function to

>     next patch. (Zhenyu)

> 

> Signed-off-by: Gao, Fred <fred.gao@intel.com>

> ---


I just try to test this series as I haven't checked all definition correctness for these cmds. On latest gvt-staging for host/guest, I got below error that failed linux guest.

[  578.692201] vfio_mdev 59f41f94-a91e-11e9-bca5-77e06e0f5813: Adding to iommu group 0 [  578.692204] vfio_mdev 59f41f94-a91e-11e9-bca5-77e06e0f5813: MDEV: group_id = 0 [  602.103214] [drm:drm_mode_addfb2] [FB:104] [  603.301618] gvt: len is not valid:  len=19  valid_len=3 [  603.301621] gvt: vgpu 1: cmd parser error [  603.301622] 0x0 [  603.301622] 0x22 

[  603.301624] gvt: vgpu 1: scan workload error [  603.301625] GVT Internal error  for the guest [  603.301626] Now vgpu 1 will enter failsafe mode.
[  603.301627] gvt: vgpu 1: failed to submit desc 0 [  603.301628] gvt: vgpu 1: fail submit workload on ring 0 [  603.301629] gvt: vgpu 1: fail to emulate MMIO write 00002230 len 4

Pls verify this series against latest gvt-staging.

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