radv: disable viewport clamping even if FS doesn't write Z

Submitted by Samuel Pitoiset on June 18, 2019, 4:58 p.m.

Details

Message ID 20190618165840.10905-1-samuel.pitoiset@gmail.com
State New
Headers show
Series "radv: disable viewport clamping even if FS doesn't write Z" ( rev: 1 ) in Mesa

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Commit Message

Samuel Pitoiset June 18, 2019, 4:58 p.m.
This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
---
 src/amd/vulkan/radv_pipeline.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

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diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 8bc0d9b53e6..765f6105f7d 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2788,8 +2788,7 @@  radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs,
 	db_render_override |= S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
 			      S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
 
-	if (!pCreateInfo->pRasterizationState->depthClampEnable &&
-	    ps->info.info.ps.writes_z) {
+	if (!pCreateInfo->pRasterizationState->depthClampEnable) {
 		/* From VK_EXT_depth_range_unrestricted spec:
 		 *
 		 * "The behavior described in Primitive Clipping still applies.

Comments


On Tue, 2019-06-18 at 18:58 +0200, Samuel Pitoiset wrote:
> This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.
> 
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
> ---
>  src/amd/vulkan/radv_pipeline.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 


could this patch be a candidate for stable release?


	J.A.

> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
> index 8bc0d9b53e6..765f6105f7d 100644
> --- a/src/amd/vulkan/radv_pipeline.c
> +++ b/src/amd/vulkan/radv_pipeline.c
> @@ -2788,8 +2788,7 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs,
>  	db_render_override |= S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
>  			      S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
>  
> -	if (!pCreateInfo->pRasterizationState->depthClampEnable &&
> -	    ps->info.info.ps.writes_z) {
> +	if (!pCreateInfo->pRasterizationState->depthClampEnable) {
>  		/* From VK_EXT_depth_range_unrestricted spec:
>  		 *
>  		 * "The behavior described in Primitive Clipping still applies.
On 6/20/19 10:54 AM, Juan A. Suarez Romero wrote:
> On Tue, 2019-06-18 at 18:58 +0200, Samuel Pitoiset wrote:
>> This fixes new CTS dEQP-VK.pipeline.depth_range_unrestricted.*.
>>
>> Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
>> ---
>>   src/amd/vulkan/radv_pipeline.c | 3 +--
>>   1 file changed, 1 insertion(+), 2 deletions(-)
>>
>
> could this patch be a candidate for stable release?
Yes, it can.
>
>
> 	J.A.
>
>> diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
>> index 8bc0d9b53e6..765f6105f7d 100644
>> --- a/src/amd/vulkan/radv_pipeline.c
>> +++ b/src/amd/vulkan/radv_pipeline.c
>> @@ -2788,8 +2788,7 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs,
>>   	db_render_override |= S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) |
>>   			      S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE);
>>   
>> -	if (!pCreateInfo->pRasterizationState->depthClampEnable &&
>> -	    ps->info.info.ps.writes_z) {
>> +	if (!pCreateInfo->pRasterizationState->depthClampEnable) {
>>   		/* From VK_EXT_depth_range_unrestricted spec:
>>   		 *
>>   		 * "The behavior described in Primitive Clipping still applies.