[23/23] drm/i915: WARN about invalid lane reversal in TBT-alt/DP-alt modes

Submitted by Imre Deak on June 4, 2019, 2:58 p.m.

Details

Message ID 20190604145826.16424-24-imre.deak@intel.com
State New
Headers show
Series "drm/i915: Fix TypeC port mode switching" ( rev: 2 1 ) in Intel GFX

Not browsing as part of any series.

Commit Message

Imre Deak June 4, 2019, 2:58 p.m.
Lane reversal happens only in the FIA module for TBT-alt/DP-alt mode, so
WARN if lane reversal is attempted at a different level. See the
BSpec DDI_BUF_CTL register description.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 2 ++
 1 file changed, 2 insertions(+)

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diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 9c198f1a3a91..5f535f17d7b3 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3591,6 +3591,8 @@  static void intel_ddi_set_fia_lane_count(struct intel_encoder *encoder,
 	u32 val = I915_READ(PORT_TX_DFLEXDPMLE1);
 	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
 
+	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
+
 	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
 	switch (pipe_config->lane_count) {
 	case 1:

Comments

On Tue, 2019-06-04 at 17:58 +0300, Imre Deak wrote:
> Lane reversal happens only in the FIA module for TBT-alt/DP-alt mode,

> so

> WARN if lane reversal is attempted at a different level. See the

> BSpec DDI_BUF_CTL register description.


Reviewed-by: José Roberto de Souza <jose.souza@intel.com>


> 

> Cc: Manasi Navare <manasi.d.navare@intel.com>

> Cc: José Roberto de Souza <jose.souza@intel.com>

> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

> Signed-off-by: Imre Deak <imre.deak@intel.com>

> ---

>  drivers/gpu/drm/i915/intel_ddi.c | 2 ++

>  1 file changed, 2 insertions(+)

> 

> diff --git a/drivers/gpu/drm/i915/intel_ddi.c

> b/drivers/gpu/drm/i915/intel_ddi.c

> index 9c198f1a3a91..5f535f17d7b3 100644

> --- a/drivers/gpu/drm/i915/intel_ddi.c

> +++ b/drivers/gpu/drm/i915/intel_ddi.c

> @@ -3591,6 +3591,8 @@ static void intel_ddi_set_fia_lane_count(struct

> intel_encoder *encoder,

>  	u32 val = I915_READ(PORT_TX_DFLEXDPMLE1);

>  	bool lane_reversal = dig_port->saved_port_bits &

> DDI_BUF_PORT_REVERSAL;

>  

> +	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);

> +

>  	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);

>  	switch (pipe_config->lane_count) {

>  	case 1:
On Fri, 2019-06-07 at 17:13 -0700, José Roberto de Souza wrote:
> On Tue, 2019-06-04 at 17:58 +0300, Imre Deak wrote:

> > Lane reversal happens only in the FIA module for TBT-alt/DP-alt

> > mode,

> > so

> > WARN if lane reversal is attempted at a different level. See the

> > BSpec DDI_BUF_CTL register description.

> 

> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>


Hi Imre

Going to review the renaming after wednesday if no one does, please go
ahead and push the ones reviewed.

> 

> > Cc: Manasi Navare <manasi.d.navare@intel.com>

> > Cc: José Roberto de Souza <jose.souza@intel.com>

> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>

> > Signed-off-by: Imre Deak <imre.deak@intel.com>

> > ---

> >  drivers/gpu/drm/i915/intel_ddi.c | 2 ++

> >  1 file changed, 2 insertions(+)

> > 

> > diff --git a/drivers/gpu/drm/i915/intel_ddi.c

> > b/drivers/gpu/drm/i915/intel_ddi.c

> > index 9c198f1a3a91..5f535f17d7b3 100644

> > --- a/drivers/gpu/drm/i915/intel_ddi.c

> > +++ b/drivers/gpu/drm/i915/intel_ddi.c

> > @@ -3591,6 +3591,8 @@ static void

> > intel_ddi_set_fia_lane_count(struct

> > intel_encoder *encoder,

> >  	u32 val = I915_READ(PORT_TX_DFLEXDPMLE1);

> >  	bool lane_reversal = dig_port->saved_port_bits &

> > DDI_BUF_PORT_REVERSAL;

> >  

> > +	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);

> > +

> >  	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);

> >  	switch (pipe_config->lane_count) {

> >  	case 1: