radeonsi: fix a regression in si_rebind_buffer

Submitted by Marek Olšák on May 21, 2019, 6:34 p.m.

Details

Message ID 20190521183403.14026-1-maraeo@gmail.com
State New
Headers show
Series "radeonsi: fix a regression in si_rebind_buffer" ( rev: 1 ) in Mesa

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Commit Message

Marek Olšák May 21, 2019, 6:34 p.m.
From: Marek Olšák <marek.olsak@amd.com>

Don't update non-buffer images.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110701
Fixes: 78e35df52aa2f7d770f929a0866a0faa89c261a9 "radeonsi: update buffer descriptors in all contexts after buffer invalidation"
Cc: 19.1 <mesa-stable@lists.freedesktop.org>
---
 src/gallium/drivers/radeonsi/si_descriptors.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

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diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 84c9d674981..1cb0ac93caa 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -1698,21 +1698,22 @@  void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
 		for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
 			struct si_samplers *samplers = &sctx->samplers[shader];
 			struct si_descriptors *descs =
 				si_sampler_and_image_descriptors(sctx, shader);
 			unsigned mask = samplers->enabled_mask;
 
 			while (mask) {
 				unsigned i = u_bit_scan(&mask);
 				struct pipe_resource *buffer = samplers->views[i]->texture;
 
-				if (buffer && (!buf || buffer == buf)) {
+				if (buffer && buffer->target == PIPE_BUFFER &&
+				    (!buf || buffer == buf)) {
 					unsigned desc_slot = si_get_sampler_slot(i);
 
 					si_set_buf_desc_address(si_resource(buffer),
 								samplers->views[i]->u.buf.offset,
 								descs->list + desc_slot * 16 + 4);
 					sctx->descriptors_dirty |=
 						1u << si_sampler_and_image_descriptors_idx(shader);
 
 					radeon_add_to_gfx_buffer_list_check_mem(
 						sctx, si_resource(buffer),
@@ -1728,21 +1729,22 @@  void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
 		for (shader = 0; shader < SI_NUM_SHADERS; ++shader) {
 			struct si_images *images = &sctx->images[shader];
 			struct si_descriptors *descs =
 				si_sampler_and_image_descriptors(sctx, shader);
 			unsigned mask = images->enabled_mask;
 
 			while (mask) {
 				unsigned i = u_bit_scan(&mask);
 				struct pipe_resource *buffer = images->views[i].resource;
 
-				if (buffer && (!buf || buffer == buf)) {
+				if (buffer && buffer->target == PIPE_BUFFER &&
+				    (!buf || buffer == buf)) {
 					unsigned desc_slot = si_get_image_slot(i);
 
 					if (images->views[i].access & PIPE_IMAGE_ACCESS_WRITE)
 						si_mark_image_range_valid(&images->views[i]);
 
 					si_set_buf_desc_address(si_resource(buffer),
 								images->views[i].u.buf.offset,
 								descs->list + desc_slot * 8 + 4);
 					sctx->descriptors_dirty |=
 						1u << si_sampler_and_image_descriptors_idx(shader);
@@ -1759,21 +1761,22 @@  void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
 	/* Bindless texture handles */
 	if (!buffer || buffer->texture_handle_allocated) {
 		struct si_descriptors *descs = &sctx->bindless_descriptors;
 
 		util_dynarray_foreach(&sctx->resident_tex_handles,
 				      struct si_texture_handle *, tex_handle) {
 			struct pipe_sampler_view *view = (*tex_handle)->view;
 			unsigned desc_slot = (*tex_handle)->desc_slot;
 			struct pipe_resource *buffer = view->texture;
 
-			if (buffer && (!buf || buffer == buf)) {
+			if (buffer && buffer->target == PIPE_BUFFER &&
+			    (!buf || buffer == buf)) {
 				si_set_buf_desc_address(si_resource(buffer),
 							view->u.buf.offset,
 							descs->list +
 							desc_slot * 16 + 4);
 
 				(*tex_handle)->desc_dirty = true;
 				sctx->bindless_descriptors_dirty = true;
 
 				radeon_add_to_gfx_buffer_list_check_mem(
 					sctx, si_resource(buffer),
@@ -1786,21 +1789,22 @@  void si_rebind_buffer(struct si_context *sctx, struct pipe_resource *buf)
 	/* Bindless image handles */
 	if (!buffer || buffer->image_handle_allocated) {
 		struct si_descriptors *descs = &sctx->bindless_descriptors;
 
 		util_dynarray_foreach(&sctx->resident_img_handles,
 				      struct si_image_handle *, img_handle) {
 			struct pipe_image_view *view = &(*img_handle)->view;
 			unsigned desc_slot = (*img_handle)->desc_slot;
 			struct pipe_resource *buffer = view->resource;
 
-			if (buffer && (!buf || buffer == buf)) {
+			if (buffer && buffer->target == PIPE_BUFFER &&
+			    (!buf || buffer == buf)) {
 				if (view->access & PIPE_IMAGE_ACCESS_WRITE)
 					si_mark_image_range_valid(view);
 
 				si_set_buf_desc_address(si_resource(buffer),
 							view->u.buf.offset,
 							descs->list +
 							desc_slot * 16 + 4);
 
 				(*img_handle)->desc_dirty = true;
 				sctx->bindless_descriptors_dirty = true;

Comments

This fixes the issues I had when running Outast via vigl, thanks 

Tested-By: Gert Wollny <gert.wollny@collabora..com> 


On Di, 2019-05-21 at 14:34 -0400, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak@amd.com>
> 
> Don't update non-buffer images.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110701
> Fixes: 78e35df52aa2f7d770f929a0866a0faa89c261a9 "radeonsi: update
> buffer descriptors in all contexts after buffer invalidation"
> Cc: 19.1 <mesa-stable@lists.freedesktop.org>
> ---
>  src/gallium/drivers/radeonsi/si_descriptors.c | 12 ++++++++----
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
> b/src/gallium/drivers/radeonsi/si_descriptors.c
> index 84c9d674981..1cb0ac93caa 100644
> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
> @@ -1698,21 +1698,22 @@ void si_rebind_buffer(struct si_context
> *sctx, struct pipe_resource *buf)
>  		for (shader = 0; shader < SI_NUM_SHADERS; shader++) {
>  			struct si_samplers *samplers = &sctx-
> >samplers[shader];
>  			struct si_descriptors *descs =
>  				si_sampler_and_image_descriptors(sctx,
> shader);
>  			unsigned mask = samplers->enabled_mask;
>  
>  			while (mask) {
>  				unsigned i = u_bit_scan(&mask);
>  				struct pipe_resource *buffer =
> samplers->views[i]->texture;
>  
> -				if (buffer && (!buf || buffer == buf))
> {
> +				if (buffer && buffer->target ==
> PIPE_BUFFER &&
> +				    (!buf || buffer == buf)) {
>  					unsigned desc_slot =
> si_get_sampler_slot(i);
>  
>  					si_set_buf_desc_address(si_reso
> urce(buffer),
>  								sampler
> s->views[i]->u.buf.offset,
>  								descs-
> >list + desc_slot * 16 + 4);
>  					sctx->descriptors_dirty |=
>  						1u <<
> si_sampler_and_image_descriptors_idx(shader);
>  
>  					radeon_add_to_gfx_buffer_list_c
> heck_mem(
>  						sctx,
> si_resource(buffer),
> @@ -1728,21 +1729,22 @@ void si_rebind_buffer(struct si_context
> *sctx, struct pipe_resource *buf)
>  		for (shader = 0; shader < SI_NUM_SHADERS; ++shader) {
>  			struct si_images *images = &sctx-
> >images[shader];
>  			struct si_descriptors *descs =
>  				si_sampler_and_image_descriptors(sctx,
> shader);
>  			unsigned mask = images->enabled_mask;
>  
>  			while (mask) {
>  				unsigned i = u_bit_scan(&mask);
>  				struct pipe_resource *buffer = images-
> >views[i].resource;
>  
> -				if (buffer && (!buf || buffer == buf))
> {
> +				if (buffer && buffer->target ==
> PIPE_BUFFER &&
> +				    (!buf || buffer == buf)) {
>  					unsigned desc_slot =
> si_get_image_slot(i);
>  
>  					if (images->views[i].access &
> PIPE_IMAGE_ACCESS_WRITE)
>  						si_mark_image_range_val
> id(&images->views[i]);
>  
>  					si_set_buf_desc_address(si_reso
> urce(buffer),
>  								images-
> >views[i].u.buf.offset,
>  								descs-
> >list + desc_slot * 8 + 4);
>  					sctx->descriptors_dirty |=
>  						1u <<
> si_sampler_and_image_descriptors_idx(shader);
> @@ -1759,21 +1761,22 @@ void si_rebind_buffer(struct si_context
> *sctx, struct pipe_resource *buf)
>  	/* Bindless texture handles */
>  	if (!buffer || buffer->texture_handle_allocated) {
>  		struct si_descriptors *descs = &sctx-
> >bindless_descriptors;
>  
>  		util_dynarray_foreach(&sctx->resident_tex_handles,
>  				      struct si_texture_handle *,
> tex_handle) {
>  			struct pipe_sampler_view *view = (*tex_handle)-
> >view;
>  			unsigned desc_slot = (*tex_handle)->desc_slot;
>  			struct pipe_resource *buffer = view->texture;
>  
> -			if (buffer && (!buf || buffer == buf)) {
> +			if (buffer && buffer->target == PIPE_BUFFER &&
> +			    (!buf || buffer == buf)) {
>  				si_set_buf_desc_address(si_resource(buf
> fer),
>  							view-
> >u.buf.offset,
>  							descs->list +
>  							desc_slot * 16
> + 4);
>  
>  				(*tex_handle)->desc_dirty = true;
>  				sctx->bindless_descriptors_dirty =
> true;
>  
>  				radeon_add_to_gfx_buffer_list_check_mem
> (
>  					sctx, si_resource(buffer),
> @@ -1786,21 +1789,22 @@ void si_rebind_buffer(struct si_context
> *sctx, struct pipe_resource *buf)
>  	/* Bindless image handles */
>  	if (!buffer || buffer->image_handle_allocated) {
>  		struct si_descriptors *descs = &sctx-
> >bindless_descriptors;
>  
>  		util_dynarray_foreach(&sctx->resident_img_handles,
>  				      struct si_image_handle *,
> img_handle) {
>  			struct pipe_image_view *view = &(*img_handle)-
> >view;
>  			unsigned desc_slot = (*img_handle)->desc_slot;
>  			struct pipe_resource *buffer = view->resource;
>  
> -			if (buffer && (!buf || buffer == buf)) {
> +			if (buffer && buffer->target == PIPE_BUFFER &&
> +			    (!buf || buffer == buf)) {
>  				if (view->access &
> PIPE_IMAGE_ACCESS_WRITE)
>  					si_mark_image_range_valid(view)
> ;
>  
>  				si_set_buf_desc_address(si_resource(buf
> fer),
>  							view-
> >u.buf.offset,
>  							descs->list +
>  							desc_slot * 16
> + 4);
>  
>  				(*img_handle)->desc_dirty = true;
>  				sctx->bindless_descriptors_dirty =
> true;