radeon/uvd: fix max poc for hevc encode

Submitted by Zhang, Boyuan on May 17, 2019, 11:54 p.m.

Details

Message ID 20190517235412.20785-1-boyuan.zhang@amd.com
State New
Headers show
Series "radeon/uvd: fix max poc for hevc encode" ( rev: 1 ) in Mesa

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Commit Message

Zhang, Boyuan May 17, 2019, 11:54 p.m.
From: Boyuan Zhang <boyuan.zhang@amd.com>

Fix max poc value with hardcoded value until new feature requires
to change this in the future.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-stable@lists.freedesktop.org

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
---
 src/gallium/drivers/radeon/radeon_uvd_enc.c     | 4 +++-
 src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c | 1 -
 2 files changed, 3 insertions(+), 2 deletions(-)

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diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc.c b/src/gallium/drivers/radeon/radeon_uvd_enc.c
index 3164dbb2c20..2bfb5215be1 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc.c
@@ -73,7 +73,9 @@  radeon_uvd_enc_get_param(struct radeon_uvd_encoder *enc,
    enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
    enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
    enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
-   enc->enc_pic.max_poc = pic->seq.intra_period;
+   enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1;
+   enc->enc_pic.max_poc =
+      (enc->enc_pic.layer_ctrl.max_num_temporal_layers == 4) ? 32 : 16;
    enc->enc_pic.log2_max_poc = 0;
    for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
       i = (i >> 1);
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
index 1f41b09472f..87d3d269cb1 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -262,7 +262,6 @@  radeon_uvd_enc_session_init_hevc(struct radeon_uvd_encoder *enc)
 static void
 radeon_uvd_enc_layer_control(struct radeon_uvd_encoder *enc)
 {
-   enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1;
    enc->enc_pic.layer_ctrl.num_temporal_layers = 1;
 
    RADEON_ENC_BEGIN(RENC_UVD_IB_PARAM_LAYER_CONTROL);