[2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible

Submitted by Ville Syrjala on May 2, 2019, 8:06 p.m.

Details

Message ID 20190502200607.14504-2-ville.syrjala@linux.intel.com
State Accepted
Commit b7ffc4a839a553b07b34543684e79526f2ffecb8
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GFX

Browsing this patch as part of:
"Series without cover letter" rev 1 in Intel GFX
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Commit Message

Ville Syrjala May 2, 2019, 8:06 p.m.
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Turns out the cursor is compatible with the pipe "HDR mode". It's
only the actual SDR planes that get entirely bypassed during
blending. So let's ignore the cursor when checking if we have
any planes active that aren't HDR compatible. This fixes the
regressions in the kms_cursor_crc and kms_plane_cursor tests.

Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110579
Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes are used")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 28042a16084d..cc1203901ef4 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8927,7 +8927,8 @@  static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state)
 			PIPEMISC_YUV420_MODE_FULL_BLEND;
 
 	if (INTEL_GEN(dev_priv) >= 11 &&
-	    (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0)
+	    (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
+					   BIT(PLANE_CURSOR))) == 0)
 		val |= PIPEMISC_HDR_MODE_PRECISION;
 
 	I915_WRITE(PIPEMISC(crtc->pipe), val);

Comments

>-----Original Message-----

>From: Ville Syrjala [mailto:ville.syrjala@linux.intel.com]

>Sent: Friday, May 3, 2019 1:36 AM

>To: intel-gfx@lists.freedesktop.org

>Cc: Shankar, Uma <uma.shankar@intel.com>; Sharma, Shashank

><shashank.sharma@intel.com>

>Subject: [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible

>

>From: Ville Syrjälä <ville.syrjala@linux.intel.com>

>

>Turns out the cursor is compatible with the pipe "HDR mode". It's only the actual SDR

>planes that get entirely bypassed during blending. So let's ignore the cursor when

>checking if we have any planes active that aren't HDR compatible. This fixes the

>regressions in the kms_cursor_crc and kms_plane_cursor tests.


Checked for details around this in spec, couldn't get anything specific around how cursor
behaves wrt HDR_MODE. But with the test results it appears that they do follow the HDR
precision. With this observation and data, change looks ok.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>


>Cc: Uma Shankar <uma.shankar@intel.com>

>Cc: Shashank Sharma <shashank.sharma@intel.com>

>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110579

>Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes are

>used")

>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>---

> drivers/gpu/drm/i915/intel_display.c | 3 ++-

> 1 file changed, 2 insertions(+), 1 deletion(-)

>

>diff --git a/drivers/gpu/drm/i915/intel_display.c

>b/drivers/gpu/drm/i915/intel_display.c

>index 28042a16084d..cc1203901ef4 100644

>--- a/drivers/gpu/drm/i915/intel_display.c

>+++ b/drivers/gpu/drm/i915/intel_display.c

>@@ -8927,7 +8927,8 @@ static void bdw_set_pipemisc(const struct intel_crtc_state

>*crtc_state)

> 			PIPEMISC_YUV420_MODE_FULL_BLEND;

>

> 	if (INTEL_GEN(dev_priv) >= 11 &&

>-	    (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0)

>+	    (crtc_state->active_planes & ~(icl_hdr_plane_mask() |

>+					   BIT(PLANE_CURSOR))) == 0)

> 		val |= PIPEMISC_HDR_MODE_PRECISION;

>

> 	I915_WRITE(PIPEMISC(crtc->pipe), val);

>--

>2.21.0
On Fri, May 03, 2019 at 03:31:49PM +0000, Shankar, Uma wrote:
> 
> 
> >-----Original Message-----
> >From: Ville Syrjala [mailto:ville.syrjala@linux.intel.com]
> >Sent: Friday, May 3, 2019 1:36 AM
> >To: intel-gfx@lists.freedesktop.org
> >Cc: Shankar, Uma <uma.shankar@intel.com>; Sharma, Shashank
> ><shashank.sharma@intel.com>
> >Subject: [PATCH 2/2] drm/i915: Allow ICL pipe "HDR mode" when the cursor is visible
> >
> >From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> >Turns out the cursor is compatible with the pipe "HDR mode". It's only the actual SDR
> >planes that get entirely bypassed during blending. So let's ignore the cursor when
> >checking if we have any planes active that aren't HDR compatible. This fixes the
> >regressions in the kms_cursor_crc and kms_plane_cursor tests.
> 
> Checked for details around this in spec, couldn't get anything specific around how cursor
> behaves wrt HDR_MODE.

Yeah, the spec is rather vague on this topic.

> But with the test results it appears that they do follow the HDR
> precision. With this observation and data, change looks ok.
> 
> Reviewed-by: Uma Shankar <uma.shankar@intel.com>

Thanks. Series pushed to dinq.

> 
> >Cc: Uma Shankar <uma.shankar@intel.com>
> >Cc: Shashank Sharma <shashank.sharma@intel.com>
> >Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110579
> >Fixes: 09b25812db10 ("drm/i915: Enable pipe HDR mode on ICL if only HDR planes are
> >used")
> >Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >---
> > drivers/gpu/drm/i915/intel_display.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_display.c
> >b/drivers/gpu/drm/i915/intel_display.c
> >index 28042a16084d..cc1203901ef4 100644
> >--- a/drivers/gpu/drm/i915/intel_display.c
> >+++ b/drivers/gpu/drm/i915/intel_display.c
> >@@ -8927,7 +8927,8 @@ static void bdw_set_pipemisc(const struct intel_crtc_state
> >*crtc_state)
> > 			PIPEMISC_YUV420_MODE_FULL_BLEND;
> >
> > 	if (INTEL_GEN(dev_priv) >= 11 &&
> >-	    (crtc_state->active_planes & ~icl_hdr_plane_mask()) == 0)
> >+	    (crtc_state->active_planes & ~(icl_hdr_plane_mask() |
> >+					   BIT(PLANE_CURSOR))) == 0)
> > 		val |= PIPEMISC_HDR_MODE_PRECISION;
> >
> > 	I915_WRITE(PIPEMISC(crtc->pipe), val);
> >--
> >2.21.0
>