[v3,1/6] drm/i915/gvt: Remove typedef and let the enumeration starts from zero

Submitted by Aleksei Gimbitskii on April 23, 2019, 12:04 p.m.

Details

Message ID 20190423120413.30929-2-aleksei.gimbitskii@intel.com
State New
Headers show
Series "Fix issues reported by klocwork" ( rev: 2 ) in Intel GVT devel

Not browsing as part of any series.

Commit Message

Aleksei Gimbitskii April 23, 2019, 12:04 p.m.
Typedef is not recommended in the Linux kernel.The klocwork static code
analyzer takes the enumeration as the full range of intel_gvt_gtt_type_t.
But the intel_gvt_gtt_type_t will never be used in full range. For
example, the GTT_TYPE_INVALID will never be used as an index of an array.
Remove the typedef and let the enumeration starts from zero to pass
klocwork analysis.

This patch fixed the critial issues #483, #551, #665 reported by
klockwork.

v3:
- Remove the typedef and let the enumeration starts from zero.

Signed-off-by: Aleksei Gimbitskii <aleksei.gimbitskii@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
CC: Colin Xu <colin.xu@intel.com>
---
 drivers/gpu/drm/i915/gvt/gtt.c       | 12 ++++++------
 drivers/gpu/drm/i915/gvt/gtt.h       | 16 ++++++++--------
 drivers/gpu/drm/i915/gvt/handlers.c  |  2 +-
 drivers/gpu/drm/i915/gvt/scheduler.c |  2 +-
 4 files changed, 16 insertions(+), 16 deletions(-)

Patch hide | download patch | download mbox

diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index c2f7d20f6346..7600416db908 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -811,7 +811,7 @@  static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt);
 
 /* Allocate shadow page table without guest page. */
 static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
-		struct intel_vgpu *vgpu, intel_gvt_gtt_type_t type)
+		struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type)
 {
 	struct device *kdev = &vgpu->gvt->dev_priv->drm.pdev->dev;
 	struct intel_vgpu_ppgtt_spt *spt = NULL;
@@ -861,7 +861,7 @@  static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
 
 /* Allocate shadow page table associated with specific gfn. */
 static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt_gfn(
-		struct intel_vgpu *vgpu, intel_gvt_gtt_type_t type,
+		struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type,
 		unsigned long gfn, bool guest_pde_ips)
 {
 	struct intel_vgpu_ppgtt_spt *spt;
@@ -936,7 +936,7 @@  static int ppgtt_invalidate_spt_by_shadow_entry(struct intel_vgpu *vgpu,
 {
 	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
 	struct intel_vgpu_ppgtt_spt *s;
-	intel_gvt_gtt_type_t cur_pt_type;
+	enum intel_gvt_gtt_type cur_pt_type;
 
 	GEM_BUG_ON(!gtt_type_is_pt(get_next_pt_type(e->type)));
 
@@ -1855,7 +1855,7 @@  static void vgpu_free_mm(struct intel_vgpu_mm *mm)
  * Zero on success, negative error code in pointer if failed.
  */
 struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu,
-		intel_gvt_gtt_type_t root_entry_type, u64 pdps[])
+		enum intel_gvt_gtt_type root_entry_type, u64 pdps[])
 {
 	struct intel_gvt *gvt = vgpu->gvt;
 	struct intel_vgpu_mm *mm;
@@ -2309,7 +2309,7 @@  int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
 }
 
 static int alloc_scratch_pages(struct intel_vgpu *vgpu,
-		intel_gvt_gtt_type_t type)
+		enum intel_gvt_gtt_type type)
 {
 	struct intel_vgpu_gtt *gtt = &vgpu->gtt;
 	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
@@ -2594,7 +2594,7 @@  struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu,
  * Zero on success, negative error code if failed.
  */
 struct intel_vgpu_mm *intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu,
-		intel_gvt_gtt_type_t root_entry_type, u64 pdps[])
+		enum intel_gvt_gtt_type root_entry_type, u64 pdps[])
 {
 	struct intel_vgpu_mm *mm;
 
diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
index 32c573aea494..42d0394f0de2 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.h
+++ b/drivers/gpu/drm/i915/gvt/gtt.h
@@ -95,8 +95,8 @@  struct intel_gvt_gtt {
 	unsigned long scratch_mfn;
 };
 
-typedef enum {
-	GTT_TYPE_INVALID = -1,
+enum intel_gvt_gtt_type {
+	GTT_TYPE_INVALID = 0,
 
 	GTT_TYPE_GGTT_PTE,
 
@@ -124,7 +124,7 @@  typedef enum {
 	GTT_TYPE_PPGTT_PML4_PT,
 
 	GTT_TYPE_MAX,
-} intel_gvt_gtt_type_t;
+};
 
 enum intel_gvt_mm_type {
 	INTEL_GVT_MM_GGTT,
@@ -148,7 +148,7 @@  struct intel_vgpu_mm {
 
 	union {
 		struct {
-			intel_gvt_gtt_type_t root_entry_type;
+			enum intel_gvt_gtt_type root_entry_type;
 			/*
 			 * The 4 PDPs in ring context. For 48bit addressing,
 			 * only PDP0 is valid and point to PML4. For 32it
@@ -169,7 +169,7 @@  struct intel_vgpu_mm {
 };
 
 struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu,
-		intel_gvt_gtt_type_t root_entry_type, u64 pdps[]);
+		enum intel_gvt_gtt_type root_entry_type, u64 pdps[]);
 
 static inline void intel_vgpu_mm_get(struct intel_vgpu_mm *mm)
 {
@@ -233,7 +233,7 @@  struct intel_vgpu_ppgtt_spt {
 	struct intel_vgpu *vgpu;
 
 	struct {
-		intel_gvt_gtt_type_t type;
+		enum intel_gvt_gtt_type type;
 		bool pde_ips; /* for 64KB PTEs */
 		void *vaddr;
 		struct page *page;
@@ -241,7 +241,7 @@  struct intel_vgpu_ppgtt_spt {
 	} shadow_page;
 
 	struct {
-		intel_gvt_gtt_type_t type;
+		enum intel_gvt_gtt_type type;
 		bool pde_ips; /* for 64KB PTEs */
 		unsigned long gfn;
 		unsigned long write_cnt;
@@ -267,7 +267,7 @@  struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu,
 		u64 pdps[]);
 
 struct intel_vgpu_mm *intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu,
-		intel_gvt_gtt_type_t root_entry_type, u64 pdps[]);
+		enum intel_gvt_gtt_type root_entry_type, u64 pdps[]);
 
 int intel_vgpu_put_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]);
 
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index 18f01eeb2510..34129eacfd22 100644
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -1206,7 +1206,7 @@  static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
 
 static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification)
 {
-	intel_gvt_gtt_type_t root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY;
+	enum intel_gvt_gtt_type root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY;
 	struct intel_vgpu_mm *mm;
 	u64 *pdps;
 
diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
index 8998fa5ab198..7c99bbc3e2b8 100644
--- a/drivers/gpu/drm/i915/gvt/scheduler.c
+++ b/drivers/gpu/drm/i915/gvt/scheduler.c
@@ -1343,7 +1343,7 @@  static int prepare_mm(struct intel_vgpu_workload *workload)
 	struct execlist_ctx_descriptor_format *desc = &workload->ctx_desc;
 	struct intel_vgpu_mm *mm;
 	struct intel_vgpu *vgpu = workload->vgpu;
-	intel_gvt_gtt_type_t root_entry_type;
+	enum intel_gvt_gtt_type root_entry_type;
 	u64 pdps[GVT_RING_CTX_NR_PDPS];
 
 	switch (desc->addressing_mode) {

Comments

Reviewed-by: Colin Xu <colin.xu@intel.com>

Thans for the fix.

On 2019-04-23 20:04, Aleksei Gimbitskii wrote:
> Typedef is not recommended in the Linux kernel.The klocwork static code
> analyzer takes the enumeration as the full range of intel_gvt_gtt_type_t.
> But the intel_gvt_gtt_type_t will never be used in full range. For
> example, the GTT_TYPE_INVALID will never be used as an index of an array.
> Remove the typedef and let the enumeration starts from zero to pass
> klocwork analysis.
>
> This patch fixed the critial issues #483, #551, #665 reported by
> klockwork.
>
> v3:
> - Remove the typedef and let the enumeration starts from zero.
>
> Signed-off-by: Aleksei Gimbitskii <aleksei.gimbitskii@intel.com>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang@intel.com>
> CC: Colin Xu <colin.xu@intel.com>
> ---
>   drivers/gpu/drm/i915/gvt/gtt.c       | 12 ++++++------
>   drivers/gpu/drm/i915/gvt/gtt.h       | 16 ++++++++--------
>   drivers/gpu/drm/i915/gvt/handlers.c  |  2 +-
>   drivers/gpu/drm/i915/gvt/scheduler.c |  2 +-
>   4 files changed, 16 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index c2f7d20f6346..7600416db908 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -811,7 +811,7 @@ static int reclaim_one_ppgtt_mm(struct intel_gvt *gvt);
>   
>   /* Allocate shadow page table without guest page. */
>   static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
> -		struct intel_vgpu *vgpu, intel_gvt_gtt_type_t type)
> +		struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type)
>   {
>   	struct device *kdev = &vgpu->gvt->dev_priv->drm.pdev->dev;
>   	struct intel_vgpu_ppgtt_spt *spt = NULL;
> @@ -861,7 +861,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt(
>   
>   /* Allocate shadow page table associated with specific gfn. */
>   static struct intel_vgpu_ppgtt_spt *ppgtt_alloc_spt_gfn(
> -		struct intel_vgpu *vgpu, intel_gvt_gtt_type_t type,
> +		struct intel_vgpu *vgpu, enum intel_gvt_gtt_type type,
>   		unsigned long gfn, bool guest_pde_ips)
>   {
>   	struct intel_vgpu_ppgtt_spt *spt;
> @@ -936,7 +936,7 @@ static int ppgtt_invalidate_spt_by_shadow_entry(struct intel_vgpu *vgpu,
>   {
>   	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
>   	struct intel_vgpu_ppgtt_spt *s;
> -	intel_gvt_gtt_type_t cur_pt_type;
> +	enum intel_gvt_gtt_type cur_pt_type;
>   
>   	GEM_BUG_ON(!gtt_type_is_pt(get_next_pt_type(e->type)));
>   
> @@ -1855,7 +1855,7 @@ static void vgpu_free_mm(struct intel_vgpu_mm *mm)
>    * Zero on success, negative error code in pointer if failed.
>    */
>   struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu,
> -		intel_gvt_gtt_type_t root_entry_type, u64 pdps[])
> +		enum intel_gvt_gtt_type root_entry_type, u64 pdps[])
>   {
>   	struct intel_gvt *gvt = vgpu->gvt;
>   	struct intel_vgpu_mm *mm;
> @@ -2309,7 +2309,7 @@ int intel_vgpu_emulate_ggtt_mmio_write(struct intel_vgpu *vgpu,
>   }
>   
>   static int alloc_scratch_pages(struct intel_vgpu *vgpu,
> -		intel_gvt_gtt_type_t type)
> +		enum intel_gvt_gtt_type type)
>   {
>   	struct intel_vgpu_gtt *gtt = &vgpu->gtt;
>   	struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
> @@ -2594,7 +2594,7 @@ struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu,
>    * Zero on success, negative error code if failed.
>    */
>   struct intel_vgpu_mm *intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu,
> -		intel_gvt_gtt_type_t root_entry_type, u64 pdps[])
> +		enum intel_gvt_gtt_type root_entry_type, u64 pdps[])
>   {
>   	struct intel_vgpu_mm *mm;
>   
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.h b/drivers/gpu/drm/i915/gvt/gtt.h
> index 32c573aea494..42d0394f0de2 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.h
> +++ b/drivers/gpu/drm/i915/gvt/gtt.h
> @@ -95,8 +95,8 @@ struct intel_gvt_gtt {
>   	unsigned long scratch_mfn;
>   };
>   
> -typedef enum {
> -	GTT_TYPE_INVALID = -1,
> +enum intel_gvt_gtt_type {
> +	GTT_TYPE_INVALID = 0,
>   
>   	GTT_TYPE_GGTT_PTE,
>   
> @@ -124,7 +124,7 @@ typedef enum {
>   	GTT_TYPE_PPGTT_PML4_PT,
>   
>   	GTT_TYPE_MAX,
> -} intel_gvt_gtt_type_t;
> +};
>   
>   enum intel_gvt_mm_type {
>   	INTEL_GVT_MM_GGTT,
> @@ -148,7 +148,7 @@ struct intel_vgpu_mm {
>   
>   	union {
>   		struct {
> -			intel_gvt_gtt_type_t root_entry_type;
> +			enum intel_gvt_gtt_type root_entry_type;
>   			/*
>   			 * The 4 PDPs in ring context. For 48bit addressing,
>   			 * only PDP0 is valid and point to PML4. For 32it
> @@ -169,7 +169,7 @@ struct intel_vgpu_mm {
>   };
>   
>   struct intel_vgpu_mm *intel_vgpu_create_ppgtt_mm(struct intel_vgpu *vgpu,
> -		intel_gvt_gtt_type_t root_entry_type, u64 pdps[]);
> +		enum intel_gvt_gtt_type root_entry_type, u64 pdps[]);
>   
>   static inline void intel_vgpu_mm_get(struct intel_vgpu_mm *mm)
>   {
> @@ -233,7 +233,7 @@ struct intel_vgpu_ppgtt_spt {
>   	struct intel_vgpu *vgpu;
>   
>   	struct {
> -		intel_gvt_gtt_type_t type;
> +		enum intel_gvt_gtt_type type;
>   		bool pde_ips; /* for 64KB PTEs */
>   		void *vaddr;
>   		struct page *page;
> @@ -241,7 +241,7 @@ struct intel_vgpu_ppgtt_spt {
>   	} shadow_page;
>   
>   	struct {
> -		intel_gvt_gtt_type_t type;
> +		enum intel_gvt_gtt_type type;
>   		bool pde_ips; /* for 64KB PTEs */
>   		unsigned long gfn;
>   		unsigned long write_cnt;
> @@ -267,7 +267,7 @@ struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu,
>   		u64 pdps[]);
>   
>   struct intel_vgpu_mm *intel_vgpu_get_ppgtt_mm(struct intel_vgpu *vgpu,
> -		intel_gvt_gtt_type_t root_entry_type, u64 pdps[]);
> +		enum intel_gvt_gtt_type root_entry_type, u64 pdps[]);
>   
>   int intel_vgpu_put_ppgtt_mm(struct intel_vgpu *vgpu, u64 pdps[]);
>   
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 18f01eeb2510..34129eacfd22 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -1206,7 +1206,7 @@ static int pvinfo_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
>   
>   static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification)
>   {
> -	intel_gvt_gtt_type_t root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY;
> +	enum intel_gvt_gtt_type root_entry_type = GTT_TYPE_PPGTT_ROOT_L4_ENTRY;
>   	struct intel_vgpu_mm *mm;
>   	u64 *pdps;
>   
> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
> index 8998fa5ab198..7c99bbc3e2b8 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@ -1343,7 +1343,7 @@ static int prepare_mm(struct intel_vgpu_workload *workload)
>   	struct execlist_ctx_descriptor_format *desc = &workload->ctx_desc;
>   	struct intel_vgpu_mm *mm;
>   	struct intel_vgpu *vgpu = workload->vgpu;
> -	intel_gvt_gtt_type_t root_entry_type;
> +	enum intel_gvt_gtt_type root_entry_type;
>   	u64 pdps[GVT_RING_CTX_NR_PDPS];
>   
>   	switch (desc->addressing_mode) {