radeonsi: enable GL_EXT_shader_image_load_formatted

Submitted by Marek Olšák on April 15, 2019, 5:18 p.m.

Details

Message ID 20190415171855.23394-1-maraeo@gmail.com
State New
Headers show
Series "radeonsi: enable GL_EXT_shader_image_load_formatted" ( rev: 1 ) in Mesa

Not browsing as part of any series.

Commit Message

Marek Olšák April 15, 2019, 5:18 p.m.
From: Marek Olšák <marek.olsak@amd.com>

no changes - the driver doesn't use the format
---
 docs/relnotes/19.1.0.html             | 1 +
 src/gallium/drivers/radeonsi/si_get.c | 1 +
 2 files changed, 2 insertions(+)

Patch hide | download patch | download mbox

diff --git a/docs/relnotes/19.1.0.html b/docs/relnotes/19.1.0.html
index 1c5f8d034b7..36d6dbe27c3 100644
--- a/docs/relnotes/19.1.0.html
+++ b/docs/relnotes/19.1.0.html
@@ -33,20 +33,21 @@  Compatibility contexts may report a lower version depending on each driver.
 <h2>SHA256 checksums</h2>
 <pre>
 TBD.
 </pre>
 
 
 <h2>New features</h2>
 
 <ul>
 <li>GL_ARB_parallel_shader_compile on all drivers.</li>
+<li>GL_EXT_shader_image_load_formatted on radeonsi.</li>
 <li>GL_EXT_texture_compression_s3tc_srgb on Gallium drivers and i965 (ES extension).</li>
 <li>GL_NV_compute_shader_derivatives on iris and i965.</li>
 <li>GL_KHR_parallel_shader_compile on all drivers.</li>
 <li>VK_EXT_buffer_device_address on Intel and RADV.</li>
 <li>VK_NV_compute_shader_derivatives on Intel.</li>
 </ul>
 
 <h2>Bug fixes</h2>
 
 <ul>
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 2142d5a33f2..67fbc50998b 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -154,20 +154,21 @@  static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 	case PIPE_CAP_INT64_DIVMOD:
 	case PIPE_CAP_TGSI_CLOCK:
 	case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 	case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 	case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 	case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 	case PIPE_CAP_TGSI_BALLOT:
 	case PIPE_CAP_TGSI_VOTE:
 	case PIPE_CAP_TGSI_FS_FBFETCH:
 	case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
+	case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 		return 1;
 
 	case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 		return !SI_BIG_ENDIAN && sscreen->info.has_userptr;
 
 	case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 		return sscreen->info.has_gpu_reset_status_query ||
 		       sscreen->info.has_gpu_reset_counter_query;
 
 	case PIPE_CAP_TEXTURE_MULTISAMPLE:

Comments

I don't see this cap defined anywhere?

If it depends on an earlier series that is not pushed yet, but your
are going to,

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

On Mon, Apr 15, 2019 at 7:19 PM Marek Olšák <maraeo@gmail.com> wrote:
>
> From: Marek Olšák <marek.olsak@amd.com>
>
> no changes - the driver doesn't use the format
> ---
>  docs/relnotes/19.1.0.html             | 1 +
>  src/gallium/drivers/radeonsi/si_get.c | 1 +
>  2 files changed, 2 insertions(+)
>
> diff --git a/docs/relnotes/19.1.0.html b/docs/relnotes/19.1.0.html
> index 1c5f8d034b7..36d6dbe27c3 100644
> --- a/docs/relnotes/19.1.0.html
> +++ b/docs/relnotes/19.1.0.html
> @@ -33,20 +33,21 @@ Compatibility contexts may report a lower version depending on each driver.
>  <h2>SHA256 checksums</h2>
>  <pre>
>  TBD.
>  </pre>
>
>
>  <h2>New features</h2>
>
>  <ul>
>  <li>GL_ARB_parallel_shader_compile on all drivers.</li>
> +<li>GL_EXT_shader_image_load_formatted on radeonsi.</li>
>  <li>GL_EXT_texture_compression_s3tc_srgb on Gallium drivers and i965 (ES extension).</li>
>  <li>GL_NV_compute_shader_derivatives on iris and i965.</li>
>  <li>GL_KHR_parallel_shader_compile on all drivers.</li>
>  <li>VK_EXT_buffer_device_address on Intel and RADV.</li>
>  <li>VK_NV_compute_shader_derivatives on Intel.</li>
>  </ul>
>
>  <h2>Bug fixes</h2>
>
>  <ul>
> diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
> index 2142d5a33f2..67fbc50998b 100644
> --- a/src/gallium/drivers/radeonsi/si_get.c
> +++ b/src/gallium/drivers/radeonsi/si_get.c
> @@ -154,20 +154,21 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
>         case PIPE_CAP_INT64_DIVMOD:
>         case PIPE_CAP_TGSI_CLOCK:
>         case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
>         case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
>         case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
>         case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
>         case PIPE_CAP_TGSI_BALLOT:
>         case PIPE_CAP_TGSI_VOTE:
>         case PIPE_CAP_TGSI_FS_FBFETCH:
>         case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
> +       case PIPE_CAP_IMAGE_LOAD_FORMATTED:
>                 return 1;
>
>         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
>                 return !SI_BIG_ENDIAN && sscreen->info.has_userptr;
>
>         case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
>                 return sscreen->info.has_gpu_reset_status_query ||
>                        sscreen->info.has_gpu_reset_counter_query;
>
>         case PIPE_CAP_TEXTURE_MULTISAMPLE:
> --
> 2.17.1
>
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