[v2,2/2] drm/i915/gvt: do not let pin count of shadow mm go negative

Submitted by Zhao, Yan Y on March 27, 2019, 4:55 a.m.


Message ID 20190327045545.16022-1-yan.y.zhao@intel.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Intel GVT devel

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Commit Message

Zhao, Yan Y March 27, 2019, 4:55 a.m.
shadow mm's pin count got increased in workload preparation phase, which
is after workload scanning.
it will get decreased in complete_current_workload() anyway after
workload completion.
Sometimes, if a workload meets a scanning error, its shadow mm pin count
will not get increased but will get decreased in the end.
This patch lets shadow mm's pin count not go below 0.

v2: add fixes tag and cc stable kernel (zhenyu wang)
Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
Cc: zhenyuw@linux.intel.com
Cc: stable@vger.kernel.org #4.14+
Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
 drivers/gpu/drm/i915/gvt/gtt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

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diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
index f4c992d96087..88ed2e9df253 100644
--- a/drivers/gpu/drm/i915/gvt/gtt.c
+++ b/drivers/gpu/drm/i915/gvt/gtt.c
@@ -1946,7 +1946,7 @@  void _intel_vgpu_mm_release(struct kref *mm_ref)
 void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm)
-	atomic_dec(&mm->pincount);
+	atomic_dec_if_positive(&mm->pincount);



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This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 2707e4446688 drm/i915/gvt: vGPU graphics memory virtualization.

The bot has tested the following trees: v5.0.5, v4.19.32, v4.14.109.

v5.0.5: Build OK!
v4.19.32: Build OK!
v4.14.109: Failed to apply! Possible dependencies:
    Unable to calculate

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