[2/8] panfrost: Detect GPU version at runtime

Submitted by Tomeu Vizoso on March 4, 2019, 4:11 p.m.

Details

Message ID 20190304161144.52910-3-tomeu.vizoso@collabora.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Mesa

Not browsing as part of any series.

Commit Message

Tomeu Vizoso March 4, 2019, 4:11 p.m.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
 src/gallium/drivers/panfrost/pan_context.c | 19 +++++++++----------
 src/gallium/drivers/panfrost/pan_context.h |  3 +++
 src/gallium/drivers/panfrost/pan_screen.h  |  1 +
 3 files changed, 13 insertions(+), 10 deletions(-)

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diff --git a/src/gallium/drivers/panfrost/pan_context.c b/src/gallium/drivers/panfrost/pan_context.c
index 4c41969fd051..cfcd4b13f592 100644
--- a/src/gallium/drivers/panfrost/pan_context.c
+++ b/src/gallium/drivers/panfrost/pan_context.c
@@ -57,11 +57,6 @@  extern const char *pan_counters_base;
 
 /* TODO: Sample size, etc */
 
-/* True for t6XX, false for t8xx. TODO: Run-time settable for automatic
- * hardware configuration. */
-
-static bool is_t6xx = false;
-
 /* If set, we'll require the use of single render-target framebuffer
  * descriptors (SFBD), for older hardware -- specifically, <T760 hardware, If
  * false, we'll use the MFBD no matter what. New hardware -does- retain support
@@ -655,7 +650,7 @@  panfrost_emit_vertex_payload(struct panfrost_context *ctx)
                         .workgroups_x_shift_2 = 0x2,
                         .workgroups_x_shift_3 = 0x5,
                 },
-		.gl_enables = 0x4 | (is_t6xx ? 0 : 0x2),
+		.gl_enables = 0x4 | (ctx->is_t6xx ? 0 : 0x2),
         };
 
         memcpy(&ctx->payload_vertex, &payload, sizeof(payload));
@@ -847,7 +842,7 @@  panfrost_default_shader_backend(struct panfrost_context *ctx)
                 .unknown2_4 = MALI_NO_MSAA | 0x4e0,
         };
 
-	if (is_t6xx) {
+	if (ctx->is_t6xx) {
                 shader.unknown2_4 |= 0x10;
 	}
 
@@ -1360,7 +1355,7 @@  panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data)
                                 int s = ctx->sampler_views[t][i]->hw.nr_mipmap_levels;
 
                                 if (!rsrc->bo->is_mipmap) {
-                                        if (is_t6xx) {
+                                        if (ctx->is_t6xx) {
                                                 /* HW ERRATA, not needed after t6XX */
                                                 ctx->sampler_views[t][i]->hw.swizzled_bitmaps[1] = rsrc->bo->gpu[0];
 
@@ -1375,7 +1370,7 @@  panfrost_emit_for_draw(struct panfrost_context *ctx, bool with_vertex_data)
                                 /* Restore */
                                 ctx->sampler_views[t][i]->hw.nr_mipmap_levels = s;
 
-				if (is_t6xx) {
+				if (ctx->is_t6xx) {
 					ctx->sampler_views[t][i]->hw.unknown3A = 0;
 				}
                         }
@@ -1827,12 +1822,13 @@  panfrost_create_rasterizer_state(
         struct pipe_context *pctx,
         const struct pipe_rasterizer_state *cso)
 {
+        struct panfrost_context *ctx = pan_context(pctx);
         struct panfrost_rasterizer *so = CALLOC_STRUCT(panfrost_rasterizer);
 
         so->base = *cso;
 
         /* Bitmask, unknown meaning of the start value */
-        so->tiler_gl_enables = is_t6xx ? 0x105 : 0x7;
+        so->tiler_gl_enables = ctx->is_t6xx ? 0x105 : 0x7;
 
         so->tiler_gl_enables |= MALI_FRONT_FACE(
                                         cso->front_ccw ? MALI_CCW : MALI_CW);
@@ -2724,9 +2720,12 @@  struct pipe_context *
 panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
 {
         struct panfrost_context *ctx = CALLOC_STRUCT(panfrost_context);
+        struct panfrost_screen *pscreen = pan_screen(screen);
         memset(ctx, 0, sizeof(*ctx));
         struct pipe_context *gallium = (struct pipe_context *) ctx;
 
+        ctx->is_t6xx = pscreen->driver->query_gpu_version(pscreen) == 0x0750;
+
         gallium->screen = screen;
 
         gallium->destroy = panfrost_destroy;
diff --git a/src/gallium/drivers/panfrost/pan_context.h b/src/gallium/drivers/panfrost/pan_context.h
index b1a0a09146da..a809f207d46b 100644
--- a/src/gallium/drivers/panfrost/pan_context.h
+++ b/src/gallium/drivers/panfrost/pan_context.h
@@ -208,6 +208,9 @@  struct panfrost_context {
         struct pipe_blend_color blend_color;
         struct pipe_depth_stencil_alpha_state *depth_stencil;
         struct pipe_stencil_ref stencil_ref;
+
+        /* True for t6XX, false for t8xx. */
+        bool is_t6xx;
 };
 
 /* Corresponds to the CSO */
diff --git a/src/gallium/drivers/panfrost/pan_screen.h b/src/gallium/drivers/panfrost/pan_screen.h
index 0005b2feb156..002c430cacbc 100644
--- a/src/gallium/drivers/panfrost/pan_screen.h
+++ b/src/gallium/drivers/panfrost/pan_screen.h
@@ -65,6 +65,7 @@  struct panfrost_driver {
                              struct panfrost_bo *bo);
         void (*enable_counters) (struct panfrost_screen *screen);
         void (*dump_counters) (struct panfrost_screen *screen);
+	unsigned (*query_gpu_version) (struct panfrost_screen *screen);
 };
 
 struct panfrost_screen {

Comments

>  /* If set, we'll require the use of single render-target framebuffer
>   * descriptors (SFBD), for older hardware -- specifically, <T760 hardware, If

This require_sfbd field should also be set at the same time. In
particular, we'll want a (kernel-agnostic) routine to determine whether
a given chip version supports MFBD, so we know to use it or not.

In kernel-space, this corresponds to the "FEATURE_MRT" flag. We'll want
to import this to userspace, but tl;dr "T760+ is MFBD, T6XX/T720 is
SFBD".

> +        ctx->is_t6xx = pscreen->driver->query_gpu_version(pscreen) == 0x0750;

Where did this magic number come from? Is that for T760 or actually T600
or something else or...? For Midgard only, I suppose <= 0x0750 is
probably what you want but we'll see.

> +	unsigned (*query_gpu_version) (struct panfrost_screen *screen);

I'll implement this in the non-DRM module as well (tonight, if I get
time for it), but that's needed for merging to avoid regressing. Just
making a mental note to self -- nothing for you to worry about here :)
On Mon, Mar 4, 2019 at 1:35 PM Alyssa Rosenzweig <alyssa@rosenzweig.io> wrote:
>
> >  /* If set, we'll require the use of single render-target framebuffer
> >   * descriptors (SFBD), for older hardware -- specifically, <T760 hardware, If
>
> This require_sfbd field should also be set at the same time. In
> particular, we'll want a (kernel-agnostic) routine to determine whether
> a given chip version supports MFBD, so we know to use it or not.
>
> In kernel-space, this corresponds to the "FEATURE_MRT" flag. We'll want
> to import this to userspace, but tl;dr "T760+ is MFBD, T6XX/T720 is
> SFBD".

+1

"is_t6xx" is not going to scale. We need to do feature and issues.
Doesn't have to be in this series though.

> > +        ctx->is_t6xx = pscreen->driver->query_gpu_version(pscreen) == 0x0750;
>
> Where did this magic number come from? Is that for T760 or actually T600
> or something else or...? For Midgard only, I suppose <= 0x0750 is
> probably what you want but we'll see.

Most of midgard has a number in hex matching the marketing number, but
there's some oddballs. This one is T760 which doesn't match is_t6xx.
The other oddball is T604 which has 0x6???. Then Bifrost has a
different scheme.

> > +     unsigned (*query_gpu_version) (struct panfrost_screen *screen);
>
> I'll implement this in the non-DRM module as well (tonight, if I get
> time for it), but that's needed for merging to avoid regressing. Just
> making a mental note to self -- nothing for you to worry about here :)
> "is_t6xx" is not going to scale. We need to do feature and issues.
> Doesn't have to be in this series though.

Indeed, that's not my concern for this particular series. On that note,
I suppose it doesn't matter right now; we only advertise out-of-the-box
support for T860 so it doesn't matter if the earlier devices "regress"
temporarily; it's not worse than it is now.

> Most of midgard has a number in hex matching the marketing number, but
> there's some oddballs. This one is T760 which doesn't match is_t6xx.
> The other oddball is T604 which has 0x6???. Then Bifrost has a
> different scheme.

Lovely.