[v2,7/7] drm/msm/dpu: check split role for single flush

Submitted by Jeykumar Sankaran on Feb. 14, 2019, 1:19 a.m.

Details

Message ID 1550107156-17625-8-git-send-email-jsanka@codeaurora.org
State New
Headers show
Series "move dpu resource parsing to encoder modeset" ( rev: 1 ) in DRI devel

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Commit Message

Jeykumar Sankaran Feb. 14, 2019, 1:19 a.m.
Removing unwanted access of crtc_state for finding this information.
Use split role information to know whether we have slave ctl.

Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 +-------------
 1 file changed, 1 insertion(+), 13 deletions(-)

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diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
index 02362c5..3fc3cc0 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
@@ -347,22 +347,10 @@  static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx)
 			phys_enc);
 }
 
-static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc)
-{
-	struct dpu_crtc_state *dpu_cstate;
-
-	if (!phys_enc)
-		return false;
-
-	dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
-
-	return dpu_cstate->num_ctls > 1;
-}
-
 static bool dpu_encoder_phys_vid_needs_single_flush(
 		struct dpu_encoder_phys *phys_enc)
 {
-	return (phys_enc && _dpu_encoder_phys_is_dual_ctl(phys_enc));
+	return phys_enc->split_role != ENC_ROLE_SOLO;
 }
 
 static void _dpu_encoder_phys_vid_setup_irq_hw_idx(

Comments

On Wed, Feb 13, 2019 at 05:19:16PM -0800, Jeykumar Sankaran wrote:
> Removing unwanted access of crtc_state for finding this information.
> Use split role information to know whether we have slave ctl.
> 
> Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>

Reviewed-by: Sean Paul <sean@poorly.run>

> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 14 +-------------
>  1 file changed, 1 insertion(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index 02362c5..3fc3cc0 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -347,22 +347,10 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg, int irq_idx)
>  			phys_enc);
>  }
>  
> -static bool _dpu_encoder_phys_is_dual_ctl(struct dpu_encoder_phys *phys_enc)
> -{
> -	struct dpu_crtc_state *dpu_cstate;
> -
> -	if (!phys_enc)
> -		return false;
> -
> -	dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state);
> -
> -	return dpu_cstate->num_ctls > 1;
> -}
> -
>  static bool dpu_encoder_phys_vid_needs_single_flush(
>  		struct dpu_encoder_phys *phys_enc)
>  {
> -	return (phys_enc && _dpu_encoder_phys_is_dual_ctl(phys_enc));
> +	return phys_enc->split_role != ENC_ROLE_SOLO;
>  }
>  
>  static void _dpu_encoder_phys_vid_setup_irq_hw_idx(
> -- 
> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
> a Linux Foundation Collaborative Project
>