[2/2] radeonsi: use MEM instead of MEM_GRBM in COPY_DATA.DST_SEL

Submitted by Marek Olšák on Feb. 11, 2019, 8:26 p.m.

Details

Message ID 20190211202615.4950-2-maraeo@gmail.com
State New
Headers show
Series "Series without cover letter" ( rev: 1 ) in Mesa

Not browsing as part of any series.

Commit Message

Marek Olšák Feb. 11, 2019, 8:26 p.m.
From: Marek Olšák <marek.olsak@amd.com>

---
 src/gallium/drivers/radeonsi/si_perfcounter.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Patch hide | download patch | download mbox

diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
index d55394f2cba..4ce71f9500d 100644
--- a/src/gallium/drivers/radeonsi/si_perfcounter.c
+++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
@@ -669,21 +669,21 @@  static void si_pc_emit_select(struct si_context *sctx,
 static void si_pc_emit_start(struct si_context *sctx,
 			     struct si_resource *buffer, uint64_t va)
 {
 	struct radeon_cmdbuf *cs = sctx->gfx_cs;
 
 	radeon_add_to_buffer_list(sctx, sctx->gfx_cs, buffer,
 				  RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
 
 	radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
 	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_IMM) |
-			COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM));
+			COPY_DATA_DST_SEL(COPY_DATA_DST_MEM));
 	radeon_emit(cs, 1); /* immediate */
 	radeon_emit(cs, 0); /* unused */
 	radeon_emit(cs, va);
 	radeon_emit(cs, va >> 32);
 
 	radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL,
 			       S_036020_PERFMON_STATE(V_036020_DISABLE_AND_RESET));
 	radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
 	radeon_emit(cs, EVENT_TYPE(V_028A90_PERFCOUNTER_START) | EVENT_INDEX(0));
 	radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL,
@@ -725,34 +725,34 @@  static void si_pc_emit_read(struct si_context *sctx,
 	if (!(regs->layout & SI_PC_FAKE)) {
 		if (regs->layout & SI_PC_REG_REVERSE)
 			reg_delta = -reg_delta;
 
 		for (idx = 0; idx < count; ++idx) {
 			if (regs->counters)
 				reg = regs->counters[idx];
 
 			radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
 			radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_PERF) |
-					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM) |
+					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM) |
 					COPY_DATA_COUNT_SEL); /* 64 bits */
 			radeon_emit(cs, reg >> 2);
 			radeon_emit(cs, 0); /* unused */
 			radeon_emit(cs, va);
 			radeon_emit(cs, va >> 32);
 			va += sizeof(uint64_t);
 			reg += reg_delta;
 		}
 	} else {
 		for (idx = 0; idx < count; ++idx) {
 			radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
 			radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_IMM) |
-					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM) |
+					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM) |
 					COPY_DATA_COUNT_SEL);
 			radeon_emit(cs, 0); /* immediate */
 			radeon_emit(cs, 0);
 			radeon_emit(cs, va);
 			radeon_emit(cs, va >> 32);
 			va += sizeof(uint64_t);
 		}
 	}
 }
 

Comments

Both patches:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

On 11.02.19 21:26, Marek Olšák wrote:
> From: Marek Olšák <marek.olsak@amd.com>
> 
> ---
>   src/gallium/drivers/radeonsi/si_perfcounter.c | 6 +++---
>   1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_perfcounter.c b/src/gallium/drivers/radeonsi/si_perfcounter.c
> index d55394f2cba..4ce71f9500d 100644
> --- a/src/gallium/drivers/radeonsi/si_perfcounter.c
> +++ b/src/gallium/drivers/radeonsi/si_perfcounter.c
> @@ -669,21 +669,21 @@ static void si_pc_emit_select(struct si_context *sctx,
>   static void si_pc_emit_start(struct si_context *sctx,
>   			     struct si_resource *buffer, uint64_t va)
>   {
>   	struct radeon_cmdbuf *cs = sctx->gfx_cs;
>   
>   	radeon_add_to_buffer_list(sctx, sctx->gfx_cs, buffer,
>   				  RADEON_USAGE_WRITE, RADEON_PRIO_QUERY);
>   
>   	radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
>   	radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_IMM) |
> -			COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM));
> +			COPY_DATA_DST_SEL(COPY_DATA_DST_MEM));
>   	radeon_emit(cs, 1); /* immediate */
>   	radeon_emit(cs, 0); /* unused */
>   	radeon_emit(cs, va);
>   	radeon_emit(cs, va >> 32);
>   
>   	radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL,
>   			       S_036020_PERFMON_STATE(V_036020_DISABLE_AND_RESET));
>   	radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
>   	radeon_emit(cs, EVENT_TYPE(V_028A90_PERFCOUNTER_START) | EVENT_INDEX(0));
>   	radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL,
> @@ -725,34 +725,34 @@ static void si_pc_emit_read(struct si_context *sctx,
>   	if (!(regs->layout & SI_PC_FAKE)) {
>   		if (regs->layout & SI_PC_REG_REVERSE)
>   			reg_delta = -reg_delta;
>   
>   		for (idx = 0; idx < count; ++idx) {
>   			if (regs->counters)
>   				reg = regs->counters[idx];
>   
>   			radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
>   			radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_PERF) |
> -					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM) |
> +					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM) |
>   					COPY_DATA_COUNT_SEL); /* 64 bits */
>   			radeon_emit(cs, reg >> 2);
>   			radeon_emit(cs, 0); /* unused */
>   			radeon_emit(cs, va);
>   			radeon_emit(cs, va >> 32);
>   			va += sizeof(uint64_t);
>   			reg += reg_delta;
>   		}
>   	} else {
>   		for (idx = 0; idx < count; ++idx) {
>   			radeon_emit(cs, PKT3(PKT3_COPY_DATA, 4, 0));
>   			radeon_emit(cs, COPY_DATA_SRC_SEL(COPY_DATA_IMM) |
> -					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM_GRBM) |
> +					COPY_DATA_DST_SEL(COPY_DATA_DST_MEM) |
>   					COPY_DATA_COUNT_SEL);
>   			radeon_emit(cs, 0); /* immediate */
>   			radeon_emit(cs, 0);
>   			radeon_emit(cs, va);
>   			radeon_emit(cs, va >> 32);
>   			va += sizeof(uint64_t);
>   		}
>   	}
>   }
>   
>