[2/3] drm/amdgpu: Fix a typo in vega10_ih_set_rptr()

Submitted by Kuehling, Felix on Feb. 6, 2019, 4:26 p.m.


Message ID DM5PR12MB1707AB38B8039A41F07FC1E7926F0@DM5PR12MB1707.namprd12.prod.outlook.com
State New
Headers show
Series "Series without cover letter" ( rev: 2 1 ) in AMD X.Org drivers

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Commit Message

Kuehling, Felix Feb. 6, 2019, 4:26 p.m.
Are you sure about this? Typically 64-bit doorbells don't wrap around. But this one does. If the IH doorbell wraps around, there is no reason why it needs to be 64-bit, so I suspect it may still be a 32-bit doorbell.

AFAIK, not all doorbells on Vega10 are 64-bit. It depends on the IP block. Therefore, maybe some of your other renaming changes should be reconsidered if they assume that all doorbells are 64-bit. Maybe it makes more sense to think of 64-bit doorbells as using 2 doorbell indexes.


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diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 796004896661..36f0e3cada30 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -377,7 +377,7 @@  static void vega10_ih_set_rptr(struct amdgpu_device *adev,
        if (ih->use_doorbell) {
                /* XXX check if swapping is necessary on BE */
                *ih->rptr_cpu = ih->rptr;
-               WDOORBELL32(ih->doorbell_idx_in_dw, ih->rptr);
+               WDOORBELL64(ih->doorbell_idx_in_dw, ih->rptr);
        } else if (ih == &adev->irq.ih) {
                WREG32_SOC15(OSSSYS, 0, mmIH_RB_RPTR, ih->rptr);
        } else if (ih == &adev->irq.ih1) {