[v3,36/42] intel/compiler: implement is_zero, is_one, is_negative_one for 8-bit/16-bit

Submitted by Iago Toral Quiroga on Jan. 15, 2019, 1:54 p.m.

Details

Message ID 20190115135414.2313-37-itoral@igalia.com
State New
Headers show
Series "intel: VK_KHR_shader_float16_int8 implementation" ( rev: 5 4 ) in Mesa

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Commit Message

Iago Toral Quiroga Jan. 15, 2019, 1:54 p.m.
There are no 8-bit immediates, so assert in that case.
16-bit immediates are replicated in each word of a 32-bit immediate, so
we only need to check the lower 16-bits.

v2:
 - Fix is_zero with half-float to consider -0 as well (Jason).
 - Fix is_negative_one for word type.
---
 src/intel/compiler/brw_shader.cpp | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

Patch hide | download patch | download mbox

diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
index 97966c951a1..3c636c9d3a4 100644
--- a/src/intel/compiler/brw_shader.cpp
+++ b/src/intel/compiler/brw_shader.cpp
@@ -704,11 +704,20 @@  backend_reg::is_zero() const
    if (file != IMM)
       return false;
 
+   assert(type_sz(type) > 1);
+
    switch (type) {
+   case BRW_REGISTER_TYPE_HF:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 0 || (d & 0xffff) == 0x8000;
    case BRW_REGISTER_TYPE_F:
       return f == 0;
    case BRW_REGISTER_TYPE_DF:
       return df == 0;
+   case BRW_REGISTER_TYPE_W:
+   case BRW_REGISTER_TYPE_UW:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 0;
    case BRW_REGISTER_TYPE_D:
    case BRW_REGISTER_TYPE_UD:
       return d == 0;
@@ -726,11 +735,20 @@  backend_reg::is_one() const
    if (file != IMM)
       return false;
 
+   assert(type_sz(type) > 1);
+
    switch (type) {
+   case BRW_REGISTER_TYPE_HF:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 0x3c00;
    case BRW_REGISTER_TYPE_F:
       return f == 1.0f;
    case BRW_REGISTER_TYPE_DF:
       return df == 1.0;
+   case BRW_REGISTER_TYPE_W:
+   case BRW_REGISTER_TYPE_UW:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 1;
    case BRW_REGISTER_TYPE_D:
    case BRW_REGISTER_TYPE_UD:
       return d == 1;
@@ -748,11 +766,19 @@  backend_reg::is_negative_one() const
    if (file != IMM)
       return false;
 
+   assert(type_sz(type) > 1);
+
    switch (type) {
+   case BRW_REGISTER_TYPE_HF:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 0xbc00;
    case BRW_REGISTER_TYPE_F:
       return f == -1.0;
    case BRW_REGISTER_TYPE_DF:
       return df == -1.0;
+   case BRW_REGISTER_TYPE_W:
+      assert((d & 0xffff) == ((d >> 16) & 0xffff));
+      return (d & 0xffff) == 0xffff;
    case BRW_REGISTER_TYPE_D:
       return d == -1;
    case BRW_REGISTER_TYPE_Q:

Comments

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

On Tue, Jan 15, 2019 at 7:55 AM Iago Toral Quiroga <itoral@igalia.com>
wrote:

> There are no 8-bit immediates, so assert in that case.
> 16-bit immediates are replicated in each word of a 32-bit immediate, so
> we only need to check the lower 16-bits.
>
> v2:
>  - Fix is_zero with half-float to consider -0 as well (Jason).
>  - Fix is_negative_one for word type.
> ---
>  src/intel/compiler/brw_shader.cpp | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
>
> diff --git a/src/intel/compiler/brw_shader.cpp
> b/src/intel/compiler/brw_shader.cpp
> index 97966c951a1..3c636c9d3a4 100644
> --- a/src/intel/compiler/brw_shader.cpp
> +++ b/src/intel/compiler/brw_shader.cpp
> @@ -704,11 +704,20 @@ backend_reg::is_zero() const
>     if (file != IMM)
>        return false;
>
> +   assert(type_sz(type) > 1);
> +
>     switch (type) {
> +   case BRW_REGISTER_TYPE_HF:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 0 || (d & 0xffff) == 0x8000;
>     case BRW_REGISTER_TYPE_F:
>        return f == 0;
>     case BRW_REGISTER_TYPE_DF:
>        return df == 0;
> +   case BRW_REGISTER_TYPE_W:
> +   case BRW_REGISTER_TYPE_UW:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 0;
>     case BRW_REGISTER_TYPE_D:
>     case BRW_REGISTER_TYPE_UD:
>        return d == 0;
> @@ -726,11 +735,20 @@ backend_reg::is_one() const
>     if (file != IMM)
>        return false;
>
> +   assert(type_sz(type) > 1);
> +
>     switch (type) {
> +   case BRW_REGISTER_TYPE_HF:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 0x3c00;
>     case BRW_REGISTER_TYPE_F:
>        return f == 1.0f;
>     case BRW_REGISTER_TYPE_DF:
>        return df == 1.0;
> +   case BRW_REGISTER_TYPE_W:
> +   case BRW_REGISTER_TYPE_UW:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 1;
>     case BRW_REGISTER_TYPE_D:
>     case BRW_REGISTER_TYPE_UD:
>        return d == 1;
> @@ -748,11 +766,19 @@ backend_reg::is_negative_one() const
>     if (file != IMM)
>        return false;
>
> +   assert(type_sz(type) > 1);
> +
>     switch (type) {
> +   case BRW_REGISTER_TYPE_HF:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 0xbc00;
>     case BRW_REGISTER_TYPE_F:
>        return f == -1.0;
>     case BRW_REGISTER_TYPE_DF:
>        return df == -1.0;
> +   case BRW_REGISTER_TYPE_W:
> +      assert((d & 0xffff) == ((d >> 16) & 0xffff));
> +      return (d & 0xffff) == 0xffff;
>     case BRW_REGISTER_TYPE_D:
>        return d == -1;
>     case BRW_REGISTER_TYPE_Q:
> --
> 2.17.1
>
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