[3/5] drm/amdgpu: update THM IP register header to support BACO

Submitted by Qu, Jim on Jan. 11, 2019, 3:19 a.m.

Details

Message ID 20190111031950.32475-4-Jim.Qu@amd.com
State Accepted
Commit 6a789aa8d5f4b4a165de2fb590511f22b1e81c1e
Headers show
Series "Enable BACO function on VG20" ( rev: 1 ) in AMD X.Org drivers

Not browsing as part of any series.

Commit Message

Qu, Jim Jan. 11, 2019, 3:19 a.m.
Change-Id: I484ba66c2e6f20123e6004cb6671e6a6ee6cf27b
Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
---
 drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h | 3 +++
 1 file changed, 3 insertions(+)

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diff --git a/drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h b/drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h
index a9eb57a53e59..a485526f3a51 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h
@@ -46,4 +46,7 @@ 
 #define mmTHM_TCON_THERM_TRIP                                                                          0x0002
 #define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0
 
+#define mmTHM_BACO_CNTL                                                                                0x0081
+#define mmTHM_BACO_CNTL_BASE_IDX                                                                       0
+
 #endif