[v2,40/53] intel/compiler: handle conversions between int and half-float on atom

Submitted by Iago Toral Quiroga on Dec. 19, 2018, 11:51 a.m.

Details

Message ID 20181219115121.20815-41-itoral@igalia.com
State New
Headers show
Series "intel: VK_KHR_shader_float16_int8 implementation" ( rev: 3 ) in Mesa

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Commit Message

Iago Toral Quiroga Dec. 19, 2018, 11:51 a.m.
---
 src/intel/compiler/brw_fs_nir.cpp | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

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diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index a9fd98bab68..57bc8a01a91 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -848,13 +848,22 @@  fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
        */
 
    case nir_op_f2f16:
-   case nir_op_i2f16:
-   case nir_op_u2f16:
    case nir_op_i2i8:
    case nir_op_u2u8:
+      assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
+      inst = bld.MOV(result, op[0]);
+      inst->saturate = instr->dest.saturate;
+      break;
+
+   case nir_op_i2f16:
+   case nir_op_u2f16:
    case nir_op_f2i8:
    case nir_op_f2u8:
       assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
+   case nir_op_f2i16:
+   case nir_op_f2u16:
+      if (fixup_int_half_float_conversion(bld, result, op[0], instr->dest.saturate, devinfo))
+         break;
       inst = bld.MOV(result, op[0]);
       inst->saturate = instr->dest.saturate;
       break;
@@ -890,8 +899,6 @@  fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
    case nir_op_f2f32:
    case nir_op_f2i32:
    case nir_op_f2u32:
-   case nir_op_f2i16:
-   case nir_op_f2u16:
    case nir_op_i2i32:
    case nir_op_u2u32:
    case nir_op_i2i16:

Comments

On Wed, Dec 19, 2018 at 12:51:08PM +0100, Iago Toral Quiroga wrote:
> ---
>  src/intel/compiler/brw_fs_nir.cpp | 15 +++++++++++----
>  1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
> index a9fd98bab68..57bc8a01a91 100644
> --- a/src/intel/compiler/brw_fs_nir.cpp
> +++ b/src/intel/compiler/brw_fs_nir.cpp
> @@ -848,13 +848,22 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
>         */
>  
>     case nir_op_f2f16:
> -   case nir_op_i2f16:
> -   case nir_op_u2f16:
>     case nir_op_i2i8:
>     case nir_op_u2u8:
> +      assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
> +      inst = bld.MOV(result, op[0]);
> +      inst->saturate = instr->dest.saturate;
> +      break;
> +
> +   case nir_op_i2f16:
> +   case nir_op_u2f16:
>     case nir_op_f2i8:
>     case nir_op_f2u8:
>        assert(type_sz(op[0].type) < 8); /* brw_nir_lower_conversions */
> +   case nir_op_f2i16:
> +   case nir_op_f2u16:
> +      if (fixup_int_half_float_conversion(bld, result, op[0], instr->dest.saturate, devinfo))

It looks we should wrap this line. Logic itself looks right:

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

> +         break;
>        inst = bld.MOV(result, op[0]);
>        inst->saturate = instr->dest.saturate;
>        break;
> @@ -890,8 +899,6 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)
>     case nir_op_f2f32:
>     case nir_op_f2i32:
>     case nir_op_f2u32:
> -   case nir_op_f2i16:
> -   case nir_op_f2u16:
>     case nir_op_i2i32:
>     case nir_op_u2u32:
>     case nir_op_i2i16:
> -- 
> 2.17.1
> 
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