[1/2] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU

Submitted by Jordan Crouse on Dec. 13, 2018, 5:31 p.m.

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Message ID 20181213173149.6975-2-jcrouse@codeaurora.org
State New
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Series "arm64: dts: sdm845: Add sdm845 GPU interconnect" ( rev: 1 ) in Freedreno

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Commit Message

Jordan Crouse Dec. 13, 2018, 5:31 p.m.
Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---
 Documentation/devicetree/bindings/display/msm/gpu.txt | 6 ++++++
 1 file changed, 6 insertions(+)

Patch hide | download patch | download mbox

diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index 8d9415180c22..be6b5628e052 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -19,6 +19,9 @@  Required properties:
   * "mem_iface"
 - iommus: optional phandle to an adreno iommu instance
 - operating-points-v2: optional phandle to the OPP operating points
+- interconnect: optional phandle to a interconnect provider.  See
+  ../interconnect/interconnect.txt for details.
+- interconnect-names: Name string for the interconnects.
 - qcom,gmu: For a6xx and newer targets a phandle to the GMU device that will
   control the power for the GPU
 
@@ -68,6 +71,9 @@  Example a6xx (with GMU):
 
 		operating-points-v2 = <&gpu_opp_table>;
 
+		interconnects = <&qnoc MASTER_GFX3D &qnoc SLAVE_EBI1>;
+		interconnect-names = "gfx-mem";
+
 		qcom,gmu = <&gmu>;
 	};
 };